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Message-Id: <1455673992-16469-3-git-send-email-jay.xu@rock-chips.com>
Date:	Wed, 17 Feb 2016 09:53:08 +0800
From:	"jianqun.xu" <jay.xu@...k-chips.com>
To:	heiko@...ech.de, robh+dt@...nel.org, pawel.moll@....com,
	mark.rutland@....com, ijc+devicetree@...lion.org.uk,
	galak@...eaurora.org, jwerner@...omium.org, broonie@...nel.org,
	catalin.marinas@....com, will.deacon@....com, sboyd@...eaurora.org,
	linus.walleij@...aro.org, sjoerd.simons@...labora.co.uk
Cc:	huangtao@...k-chips.com, linux-rockchip@...ts.infradead.org,
	linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	devicetree@...r.kernel.org, Xu Jianqun <jay.xu@...k-chips.com>
Subject: [PATCH 2/6] spi: rockchip: add bindings for rk3399 spi

From: Xu Jianqun <jay.xu@...k-chips.com>

Add devicetree bindings for Rockchip rk3399 spi which found on
Rockchip rk3399 SoCs.

Signed-off-by: Xu Jianqun <jay.xu@...k-chips.com>
---
 Documentation/devicetree/bindings/spi/spi-rockchip.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/spi/spi-rockchip.txt b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
index 0c491bd..1b14d69 100644
--- a/Documentation/devicetree/bindings/spi/spi-rockchip.txt
+++ b/Documentation/devicetree/bindings/spi/spi-rockchip.txt
@@ -9,6 +9,7 @@ Required Properties:
     "rockchip,rk3066-spi" for rk3066.
     "rockchip,rk3188-spi", "rockchip,rk3066-spi" for rk3188.
     "rockchip,rk3288-spi", "rockchip,rk3066-spi" for rk3288.
+    "rockchip,rk3399-spi", "rockchip,rk3066-spi" for rk3399.
 - reg: physical base address of the controller and length of memory mapped
        region.
 - interrupts: The interrupt number to the cpu. The interrupt specifier format
-- 
1.9.1


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