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Message-ID: <56C3E423.5080801@huawei.com>
Date: Wed, 17 Feb 2016 11:08:19 +0800
From: xuejiancheng <xuejiancheng@...wei.com>
To: Michael Turquette <mturquette@...libre.com>,
<sboyd@...eaurora.org>, <p.zabel@...gutronix.de>,
<robh+dt@...nel.org>, <pawel.moll@....com>, <mark.rutland@....com>,
<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
<linux@....linux.org.uk>, <khilman@...aro.org>, <arnd@...db.de>,
<olof@...om.net>, <xuwei5@...ilicon.com>,
<haojian.zhuang@...aro.org>, <zhangfei.gao@...aro.org>,
<bintian.wang@...wei.com>
CC: <linux-kernel@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <yanhaifeng@...ilicon.com>,
<yanghongwei@...ilicon.com>, <suwenping@...ilicon.com>,
<raojun@...ilicon.com>, <ml.yang@...ilicon.com>,
<gaofei@...ilicon.com>, <zhangzhenxing@...ilicon.com>,
<xuejiancheng@...ilicon.com>, <lidongpo@...ilicon.com>
Subject: Re: [RESEND PATCH v8 1/6] clk: hisilicon: add CRG driver for hi3519
soc
Hi Mike,
Thank you very much for your comments.
On 2016/2/17 8:46, Michael Turquette wrote:
> Hello Jiancheng Xue,
>
> Quoting Jiancheng Xue (2016-02-04 18:31:07)
>> diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
>> index 74dba31..3f57b09 100644
>> --- a/drivers/clk/hisilicon/Makefile
>> +++ b/drivers/clk/hisilicon/Makefile
>> @@ -4,8 +4,10 @@
>>
>> obj-y += clk.o clkgate-separated.o clkdivider-hi6220.o
>>
>> +obj-$(CONFIG_RESET_CONTROLLER) += reset.o
>
> Do you really want to build reset.o for all hisi SoCs?
>
This reset controller driver will be just used in some of hisilicon SOCs.
I'll add a specific config item for it like CONFIG_RESET_HISI. The config
item will be selected by default in SOCs needing this driver.
I'll also fix other issues in next version. Thank you!
Regards,
Jiancheng.
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