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Message-ID: <56C5A742.8010304@arm.com>
Date: Thu, 18 Feb 2016 11:13:06 +0000
From: Vladimir Murzin <vladimir.murzin@....com>
To: Arnd Bergmann <arnd@...db.de>
CC: mark.rutland@....com, devicetree@...r.kernel.org,
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Subject: Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386
On 18/02/16 10:45, Arnd Bergmann wrote:
> On Thursday 18 February 2016 10:11:37 Vladimir Murzin wrote:
>>
>> Right, I thought in a wrong way, in opposite it makes more sense now.
>>
>> .dtsi
>>
>> /* below the soc/ */
>> smb {
>> compatible = "simple-bus";
>> #address-cells = <2>;
>> #size-cells = <1>;
>> ranges = <0 0 0x40200000 0x10000>,
>> <1 0 0xa0000000 0x10000>;
>> };
>
> That looks good, yes.
>
> Is 0x10000 the correct maximum addressable size of the external bus
> in both cases?
>
> Intuitively, I would guess that the 0xa0000000 range might
> be much wider.
There is only Ethernet connected to this bus (apart from PSRAM), so it
might be wider, but there is no indication of this in documentation.
>
>> .dts
>>
>> smb {
>> ethernet@0,0 {
>> compatible = "smsc,lan9220", "smsc,lan9115";
>> reg = <0 0x0 0x10000>;
>> interrupts = <13>;
>> interrupt-parent = <&nvic>;
>> smsc,irq-active-high;
>> };
>>
>>
>> and looking again at .dtsi it seems to me that fpgaio should be moved
>> below the soc/ under separate bus interface which would hosts audio and
>> spi too or I keep missing things around device-tree?
>>
>
> I don't see the audio and spi nodes, so I'm not sure where exactly
> you would put them.
I just keep things simple ;)
>
> Ideally those things should be visible from a block diagram in the
> datasheet.
Indeed, block diagram indicates all them as a "FPGA APB subsystem" and
clearly draws a line indicating a bus those devices are connected to.
After your point about lan9220, it looks clearer to me to express that
subsystem outside of soc/ node indicating bus interface, so it would
match to those drawings closely.
Cheers
Vladimir
>
> Arnd
>
>
>
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