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Date:	Thu, 18 Feb 2016 12:47:18 +0000
From:	Vladimir Murzin <vladimir.murzin@....com>
To:	Arnd Bergmann <arnd@...db.de>
CC:	mark.rutland@....com, devicetree@...r.kernel.org,
	linux@....linux.org.uk, pawel.moll@....com,
	ijc+devicetree@...lion.org.uk, gregkh@...uxfoundation.org,
	daniel.lezcano@...aro.org, linux-kernel@...r.kernel.org,
	robh+dt@...nel.org, andy.shevchenko@...il.com,
	galak@...eaurora.org, linux-serial@...r.kernel.org,
	u.kleine-koenig@...gutronix.de, tglx@...utronix.de,
	linux-api@...r.kernel.org, jslaby@...e.cz,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 09/10] ARM: dts: introduce MPS2 AN385/AN386

On 18/02/16 12:16, Arnd Bergmann wrote:
> On Thursday 18 February 2016 11:13:06 Vladimir Murzin wrote:
>> On 18/02/16 10:45, Arnd Bergmann wrote:
>>> On Thursday 18 February 2016 10:11:37 Vladimir Murzin wrote:
>>>>
>>>> Right, I thought in a wrong way, in opposite it makes more sense now.
>>>>
>>>> .dtsi
>>>>
>>>> /* below the soc/ */
>>>> smb {
>>>>         compatible = "simple-bus";
>>>>         #address-cells = <2>;
>>>>         #size-cells = <1>;
>>>>         ranges = <0 0 0x40200000 0x10000>,
>>>>                  <1 0 0xa0000000 0x10000>;
>>>> };
>>>
>>> That looks good, yes.
>>>
>>> Is 0x10000 the correct maximum addressable size of the external bus
>>> in both cases?
>>>
>>> Intuitively, I would guess that the 0xa0000000 range might
>>> be much wider.
>>
>> There is only Ethernet connected to this bus (apart from PSRAM), so it
>> might be wider, but there is no indication of this in documentation.
> 
> I see this called "ahb_to_extmem16" in the documentation, which indicates
> that it might be use 16 bits of address space, which would match
> the 64K you listed.
> 
> For SSRAM1 / SSRAM2 / SSRAM3, a 8 MB address space is mentioned
> and 16 MB for external PSRAM at 0x21000000.
> 

Right. I'll incorporate changes in the next version. Thanks for lessons
given and your time!

Cheers
Vladimir

> 	Arnd
> 
> 
> 
> 

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