linux-kernel - Re: [PATCH v2] irqchip: irq-mvebu-odmi: new driver for platform MSI on Marvell 7K/8K

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Message-ID: <3923904.c50oLNXXZ1@wuerfel>
Date:	Thu, 18 Feb 2016 17:08:05 +0100
From:	Arnd Bergmann <arnd@...db.de>
To:	linux-arm-kernel@...ts.infradead.org
Cc:	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Marc Zyngier <marc.zyngier@....com>,
	linux-kernel@...r.kernel.org, Lior Amsalem <alior@...vell.com>,
	Andrew Lunn <andrew@...n.ch>,
	Nadav Haklai <nadavh@...vell.com>,
	Gregory Clement <gregory.clement@...e-electrons.com>,
	Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>
Subject: Re: [PATCH v2] irqchip: irq-mvebu-odmi: new driver for platform MSI on Marvell 7K/8K

On Thursday 18 February 2016 16:58:54 Thomas Petazzoni wrote:
> +- marvell,spi-base     : List of GIC base SPI interrupts, one for each
> +                         ODMI frame. Those SPI interrupts are 0-based,
> +                         i.e marvell,spi-base = <128> will use SPI #96.
> +                         See Documentation/devicetree/bindings/interrupt-controller/arm,gic.txt
> +                         for details about the GIC Device Tree binding.
> 

Why are these not just in an 'interrupts' property as we do for other
nested irqchips?

	Arnd