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Message-ID: <tip-b3ecd51559ae7a8f40b10443773b9cd0e6a50f5e@git.kernel.org>
Date: Thu, 18 Feb 2016 12:18:41 -0800
From: tip-bot for Dave Hansen <tipbot@...or.com>
To: linux-tip-commits@...r.kernel.org
Cc: mingo@...nel.org, dave.hansen@...ux.intel.com,
akpm@...ux-foundation.org, linux-kernel@...r.kernel.org,
riel@...hat.com, tglx@...utronix.de, dvlasenk@...hat.com,
peterz@...radead.org, torvalds@...ux-foundation.org, bp@...en8.de,
brgerst@...il.com, hpa@...or.com, dave@...1.net,
luto@...capital.net
Subject: [tip:mm/pkeys] x86/mm/pkeys: Add new 'PF_PK'
page fault error code bit
Commit-ID: b3ecd51559ae7a8f40b10443773b9cd0e6a50f5e
Gitweb: http://git.kernel.org/tip/b3ecd51559ae7a8f40b10443773b9cd0e6a50f5e
Author: Dave Hansen <dave.hansen@...ux.intel.com>
AuthorDate: Fri, 12 Feb 2016 13:02:07 -0800
Committer: Ingo Molnar <mingo@...nel.org>
CommitDate: Thu, 18 Feb 2016 09:31:50 +0100
x86/mm/pkeys: Add new 'PF_PK' page fault error code bit
Note: "PK" is how the Intel SDM refers to this bit, so we also
use that nomenclature.
This only defines the bit, it does not plumb it anywhere to be
handled.
Signed-off-by: Dave Hansen <dave.hansen@...ux.intel.com>
Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
Cc: Andrew Morton <akpm@...ux-foundation.org>
Cc: Andy Lutomirski <luto@...capital.net>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Brian Gerst <brgerst@...il.com>
Cc: Dave Hansen <dave@...1.net>
Cc: Denys Vlasenko <dvlasenk@...hat.com>
Cc: H. Peter Anvin <hpa@...or.com>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Rik van Riel <riel@...hat.com>
Cc: linux-mm@...ck.org
Link: http://lkml.kernel.org/r/20160212210207.DA7B43E6@viggo.jf.intel.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
arch/x86/mm/fault.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c
index eef44d9..9f72f9c 100644
--- a/arch/x86/mm/fault.c
+++ b/arch/x86/mm/fault.c
@@ -33,6 +33,7 @@
* bit 2 == 0: kernel-mode access 1: user-mode access
* bit 3 == 1: use of reserved bit detected
* bit 4 == 1: fault was an instruction fetch
+ * bit 5 == 1: protection keys block access
*/
enum x86_pf_error_code {
@@ -41,6 +42,7 @@ enum x86_pf_error_code {
PF_USER = 1 << 2,
PF_RSVD = 1 << 3,
PF_INSTR = 1 << 4,
+ PF_PK = 1 << 5,
};
/*
@@ -916,6 +918,12 @@ static int spurious_fault_check(unsigned long error_code, pte_t *pte)
if ((error_code & PF_INSTR) && !pte_exec(*pte))
return 0;
+ /*
+ * Note: We do not do lazy flushing on protection key
+ * changes, so no spurious fault will ever set PF_PK.
+ */
+ if ((error_code & PF_PK))
+ return 1;
return 1;
}
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