lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <56CB5E63.1080005@windriver.com>
Date:	Mon, 22 Feb 2016 11:15:47 -0800
From:	Yang Shi <yang.shi@...driver.com>
To:	Aaro Koskinen <aaro.koskinen@...ia.com>, <david.daney@...ium.com>
CC:	<linux-kernel@...r.kernel.org>, <linux-mips@...ux-mips.org>
Subject: Re: 4.5-rc4 kernel is failed to bootup on CN6880

On 2/22/2016 4:43 AM, Aaro Koskinen wrote:
> Hi,
>
> On Fri, Feb 19, 2016 at 05:12:41PM -0800, Yang Shi wrote:
>> I tried to boot 4.5-rc4 kernel on my CN6880 board, but it is failed at
>> booting up secondary cores. The error is:
> With v4.5-rc5, EBB6800 is booting fine:
>
> [    0.000000] CPU0 revision is: 000d9108 (Cavium Octeon II)
> [...]
> [ 2286.273935] SMP: Booting CPU01 (CoreId  1)...
> [ 2286.278201] CPU1 revision is: 000d9108 (Cavium Octeon II)
> [...]
> [ 2287.214953] SMP: Booting CPU31 (CoreId 31)...
> [ 2287.224668] CPU31 revision is: 000d9108 (Cavium Octeon II)
> [ 2287.224865] Brought up 32 CPUs
>
>> CPU31 revision is: 000d9101 (Cavium Octeon II)
>> SMP: Booting CPU32 (CoreId 32)...
>> Secondary boot timeout
>>
>> I passed "numcores=32" in kernel commandline since there are 32 cores ion
>> CN6880.
> You shouldn't have CPU32 in that case, the numbering starts from zero.
> Also the coremask is 32-bit.
>
> I can reproduce your issue with CONFIG_NR_CPUS=64. Possibly this code
> is incorrect for NR_CPUS bigger than 32:
>
>          /* The present CPUs get the lowest CPU numbers. */
>          cpus = 1;
>          for (id = 0; id < NR_CPUS; id++) {
>                  if ((id != coreid) && (core_mask & (1 << id))) {
>                          set_cpu_possible(cpus, true);
>                          set_cpu_present(cpus, true);
>
> What CONFIG_NR_CPUS did you use?

Thanks. I did have 48 NR_CPUS set. It works when I changed it to 32.

I think the problem is core_mask is 32 bit. But when NR_CPUS > 32, in 
"core_mask & (1 << id)" core_mask will be sign extended, then the 
statement will return non-zero all the time.

Yang

>
> A.
>

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ