lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <tip-dd71a17b1193dd4a4c35ecd0ba227aac3d110836@git.kernel.org>
Date:	Tue, 23 Feb 2016 00:54:40 -0800
From:	"tip-bot for Bryan O'Donoghue" <tipbot@...or.com>@zytor.com
To:	linux-tip-commits@...r.kernel.org@...or.com
Cc:	torvalds@...ux-foundation.org, andriy.shevchenko@...ux.intel.com,
	mingo@...nel.org, linux-kernel@...r.kernel.org, tglx@...utronix.de,
	peterz@...radead.org, hpa@...or.com, pure.logic@...us-software.ie
Subject: [tip:x86/platform] x86/platform/intel/quark: Change the kernel's IMR lock bit to false

Commit-ID:  dd71a17b1193dd4a4c35ecd0ba227aac3d110836
Gitweb:     http://git.kernel.org/tip/dd71a17b1193dd4a4c35ecd0ba227aac3d110836
Author:     Bryan O'Donoghue <pure.logic@...us-software.ie>
AuthorDate: Tue, 23 Feb 2016 01:29:58 +0000
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Tue, 23 Feb 2016 07:35:53 +0100

x86/platform/intel/quark: Change the kernel's IMR lock bit to false

Currently when setting up an IMR around the kernel's .text section we lock
that IMR, preventing further modification. While superficially this appears
to be the right thing to do, in fact this doesn't account for a legitimate
change in the memory map such as when executing a new kernel via kexec.

In such a scenario a second kernel can have a different size and location
to it's predecessor and can view some of the memory occupied by it's
predecessor as legitimately usable DMA RAM. If this RAM were then
subsequently allocated to DMA agents within the system it could conceivably
trigger an IMR violation.

This patch fixes the this potential situation by keeping the kernel's .text
section IMR lock bit false by default.

Suggested-by: Ingo Molnar <mingo@...nel.org>
Reported-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Signed-off-by: Bryan O'Donoghue <pure.logic@...us-software.ie>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: boon.leong.ong@...el.com
Cc: paul.gortmaker@...driver.com
Link: http://lkml.kernel.org/r/1456190999-12685-2-git-send-email-pure.logic@nexus-software.ie
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/platform/intel-quark/imr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/platform/intel-quark/imr.c b/arch/x86/platform/intel-quark/imr.c
index c61b6c3..bfadcd0 100644
--- a/arch/x86/platform/intel-quark/imr.c
+++ b/arch/x86/platform/intel-quark/imr.c
@@ -592,14 +592,14 @@ static void __init imr_fixup_memmap(struct imr_device *idev)
 	end = (unsigned long)__end_rodata - 1;
 
 	/*
-	 * Setup a locked IMR around the physical extent of the kernel
+	 * Setup an unlocked IMR around the physical extent of the kernel
 	 * from the beginning of the .text secton to the end of the
 	 * .rodata section as one physically contiguous block.
 	 *
 	 * We don't round up @size since it is already PAGE_SIZE aligned.
 	 * See vmlinux.lds.S for details.
 	 */
-	ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, true);
+	ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, false);
 	if (ret < 0) {
 		pr_err("unable to setup IMR for kernel: %zu KiB (%lx - %lx)\n",
 			size / 1024, start, end);

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ