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Message-ID: <20160223121142.GA3673@pd.tnic>
Date: Tue, 23 Feb 2016 13:11:42 +0100
From: Borislav Petkov <bp@...en8.de>
To: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
Cc: tony.luck@...el.com, hpa@...or.com, mingo@...hat.com,
tglx@...utronix.de, dougthompson@...ssion.com,
mchehab@....samsung.com, x86@...nel.org,
linux-edac@...r.kernel.org, linux-kernel@...r.kernel.org,
ashok.raj@...el.com, gong.chen@...ux.intel.com,
len.brown@...el.com, peterz@...radead.org, ak@...ux.intel.com,
alexander.shishkin@...ux.intel.com
Subject: Re: [PATCH 3/4] x86/mce: Clarify comments regarding deferred error
On Tue, Feb 16, 2016 at 03:45:10PM -0600, Aravind Gopalakrishnan wrote:
> The Deferred field indicates if we have a Deferred error.
> Deferred errors indicate errors that hardware could not
> fix. But it still does not cause any interruption to program
> flow. So it does not generate any #MC and UC bit in MCx_STATUS
> is not set.
>
> Fixing comment here. No functional change
>
> Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
> ---
> arch/x86/include/asm/mce.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
> index 2ec67ac..476da8b 100644
> --- a/arch/x86/include/asm/mce.h
> +++ b/arch/x86/include/asm/mce.h
> @@ -40,7 +40,7 @@
> #define MCI_STATUS_AR (1ULL<<55) /* Action required */
>
> /* AMD-specific bits */
> -#define MCI_STATUS_DEFERRED (1ULL<<44) /* declare an uncorrected error */
> +#define MCI_STATUS_DEFERRED (1ULL<<44) /* declare a deferred error */
/* uncorrected error, deferred exception */
sounds better to me.
> #define MCI_STATUS_POISON (1ULL<<43) /* access poisonous data */
> #define MCI_STATUS_TCC (1ULL<<55) /* Task context corrupt */
> /*
> --
For the future, such cleanups/fixes should always go first in the patch
set.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
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