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Message-Id: <4a096f2fe432276e33f04c79c523b696a3062453.1456308281.git.jslaby@suse.cz> Date: Wed, 24 Feb 2016 11:05:23 +0100 From: Jiri Slaby <jslaby@...e.cz> To: stable@...r.kernel.org Cc: linux-kernel@...r.kernel.org, CQ Tang <cq.tang@...el.com>, David Woodhouse <David.Woodhouse@...el.com>, Jiri Slaby <jslaby@...e.cz> Subject: [PATCH 3.12 128/142] iommu/vt-d: Fix 64-bit accesses to 32-bit DMAR_GSTS_REG From: CQ Tang <cq.tang@...el.com> 3.12-stable review patch. If anyone has any objections, please let me know. =============== commit fda3bec12d0979aae3f02ee645913d66fbc8a26e upstream. This is a 32-bit register. Apparently harmless on real hardware, but causing justified warnings in simulation. Signed-off-by: CQ Tang <cq.tang@...el.com> Signed-off-by: David Woodhouse <David.Woodhouse@...el.com> Signed-off-by: Jiri Slaby <jslaby@...e.cz> --- drivers/iommu/dmar.c | 2 +- drivers/iommu/intel_irq_remapping.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c index 785675a56a10..ba5d1a37a90d 100644 --- a/drivers/iommu/dmar.c +++ b/drivers/iommu/dmar.c @@ -972,7 +972,7 @@ void dmar_disable_qi(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_QIES)) goto end; diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c index b97d70b1abe0..0ff40be0f3b2 100644 --- a/drivers/iommu/intel_irq_remapping.c +++ b/drivers/iommu/intel_irq_remapping.c @@ -495,7 +495,7 @@ static void iommu_disable_irq_remapping(struct intel_iommu *iommu) raw_spin_lock_irqsave(&iommu->register_lock, flags); - sts = dmar_readq(iommu->reg + DMAR_GSTS_REG); + sts = readl(iommu->reg + DMAR_GSTS_REG); if (!(sts & DMA_GSTS_IRES)) goto end; -- 2.7.1
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