linux-kernel - Re: [PATCH v2 1/7] QE: Add IC, SI and SIRAM document to device tree bindings.

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <1456379804.5360.43.camel@buserror.net>
Date:	Wed, 24 Feb 2016 23:56:44 -0600
From:	Scott Wood <oss@...error.net>
To:	Qiang Zhao <qiang.zhao@....com>, Rob Herring <robh@...nel.org>
Cc:	Yang-Leo Li <leoyang.li@....com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>
Subject: Re: [PATCH v2 1/7] QE: Add IC, SI and SIRAM document to device tree
 bindings.

On Thu, 2016-02-25 at 05:55 +0000, Qiang Zhao wrote:
> On Thu, 2016-02-25 at 11:12  AM, Scott Wood wrote:
> > -----Original Message-----
> > From: Scott Wood [mailto:oss@...error.net]
> > Sent: Thursday, February 25, 2016 11:12 AM
> > To: Qiang Zhao <qiang.zhao@....com>; Rob Herring <robh@...nel.org>
> > Cc: Yang-Leo Li <leoyang.li@....com>; linux-kernel@...r.kernel.org;
> > devicetree@...r.kernel.org; linuxppc-dev@...ts.ozlabs.org
> > Subject: Re: [PATCH v2 1/7] QE: Add IC, SI and SIRAM document to device
> > tree
> > bindings.
> > 
> > On Thu, 2016-02-25 at 03:10 +0000, Qiang Zhao wrote:
> > > On Wed, 2016-02-24 at 04:20  AM, Scott Wood wrote:
> > > > -----Original Message-----
> > > > From: Scott Wood [mailto:oss@...error.net]
> > > > Sent: Wednesday, February 24, 2016 4:20 AM
> > > > To: Rob Herring <robh@...nel.org>; Qiang Zhao <qiang.zhao@....com>
> > > > Cc: Yang-Leo Li <leoyang.li@....com>; linux-kernel@...r.kernel.org;
> > > > devicetree@...r.kernel.org; linuxppc-dev@...ts.ozlabs.org
> > > > Subject: Re: [PATCH v2 1/7] QE: Add IC, SI and SIRAM document to
> > > > device tree bindings.
> > > > 
> > > > On Tue, 2016-02-23 at 14:15 -0600, Rob Herring wrote:
> > > > > On Thu, Feb 18, 2016 at 09:06:06AM +0800, Zhao Qiang wrote:
> > > > > > Add IC, SI and SIRAM document of QE to
> > > > > > Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> > > > > > 
> > > > > > Signed-off-by: Zhao Qiang <qiang.zhao@....com>
> > > > > > ---
> > > > > > Changes for v2
> > > > > > 	- Add interrupt-controller in Required properties
> > > > > > 	- delete address-cells and size-cells for qe-si and qe-siram
> > > > > > 
> > > > > >  .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  | 50
> > > > > > ++++++++++++++++++++++
> > > > > >  1 file changed, 50 insertions(+)
> > > > > > 
> > > > > > diff --git
> > > > > > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> > > > > > b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> > > > > > index 4f89302..84052a7 100644
> > > > > > ---
> > > > > > a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
> > > > > > +++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.tx
> > > > > > +++ t
> > > > > > @@ -69,6 +69,56 @@ Example:
> > > > > >  	};
> > > > > >       };
> > > > > > 
> > > > > > +* Interrupt Controller (IC)
> > > > > > +
> > > > > > +Required properties:
> > > > > > +- compatible : should be "fsl,qe-ic".
> > > > > 
> > > > > > +- compatible : should be "fsl,qe-si".
> > > > > 
> > > > > > +- compatible : should be "fsl,qe-siram".
> > > > > 
> > > > > These compatible strings are all a bit generic and should have SoC
> > > > > specific compatible strings.
> > > > 
> > > > I don't know about si/siram, but "fsl,qe-ic" has been around since
> > > > 2008, so it should be documented even if a more specific compatible
> > > > is also added.
> > > 
> > > Agree, and si/siram are also has been around since 2008.
> > 
> > Where?  I couldn't find them when grepping.
> 
> Sorry, I make a mistake, they have not been in upstream.
> 
> > 
> > > In addition, I don’t think it is needed to add specific compatible,
> > > because they are the same in qe-supported soc.
> > 
> > How do we know that they are 100% the same?
> 
> You mean it will be changed in later version?

That's always a possibility, but even on current chips, what bit of
documentation are you referring to that confirms it's the exact same logic?

-Scott