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Message-ID: <20160225082538.GA6357@twins.programming.kicks-ass.net>
Date:	Thu, 25 Feb 2016 09:25:38 +0100
From:	Peter Zijlstra <peterz@...radead.org>
To:	kan.liang@...el.com
Cc:	linux-kernel@...r.kernel.org, ak@...ux.intel.com,
	eranian@...gle.com, alexander.shishkin@...ux.intel.com,
	vincent.weaver@...ne.edu
Subject: Re: [RFC 1/1] perf, x86: fix pebs warning by always update msr when
 disabling pebs event

On Wed, Feb 24, 2016 at 01:01:08PM -0800, kan.liang@...el.com wrote:
> From: Kan Liang <kan.liang@...el.com>
> 
> This patch tries to fix a pebs warning found in my stress test.
> The following perf command can easily trigger the pebs warning or
> spurious NMI error on Skylake/Broadwell/Haswell platforms.
> 
> sudo perf record -e
> 'cpu/umask=0x04,event=0xc4/pp,cycles,branches,ref-cycles,cache-misses,
> cache-references' --call-graph fp -b -c1000 -a
> Also NMI watchdog must be enabled.
> 
> For this case, the events number is larger than counter number. So
> perf has to do multiplexing. In perf_mux_hrtimer_handler, it does
> perf_pmu_disable, schedule out old events, rotate_ctx, schedule in new
> events and finally perf_pmu_enable. If the old events include precise
> event, the MSR_IA32_PEBS_ENABLE should be cleared when perf_pmu_disable.
> The MSR_IA32_PEBS_ENABLE should keep 0 until the perf_pmu_enable is
> called and the new event is precise event.

Right, so intel_pmu_pebs_disable_all() should be called and should be
writing a 0 here.

> However, unfortunately, for some reason, MSR_IA32_PEBS_ENABLE still
> keeps the old state according to my test. 

Yeah, that a problem, please continue looking and find the root cause,
we really do not want to band-aid our way around such problems, that
always leads to surprises later on.

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