linux-kernel - [PATCH v2 1/2] dt/bindings: Add bindings for PIC32 deadman timer peripheral

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Message-ID: <1456425056-24483-1-git-send-email-joshua.henderson@microchip.com>
Date:	Thu, 25 Feb 2016 11:30:50 -0700
From:	Joshua Henderson <joshua.henderson@...rochip.com>
To:	<linux-kernel@...r.kernel.org>
CC:	<linux-mips@...ux-mips.org>, <ralf@...ux-mips.org>,
	Purna Chandra Mandal <purna.mandal@...rochip.com>,
	Joshua Henderson <joshua.henderson@...rochip.com>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Wim Van Sebroeck <wim@...ana.be>,
	Guenter Roeck <linux@...ck-us.net>,
	<devicetree@...r.kernel.org>, <linux-watchdog@...r.kernel.org>
Subject: [PATCH v2 1/2] dt/bindings: Add bindings for PIC32 deadman timer peripheral

From: Purna Chandra Mandal <purna.mandal@...rochip.com>

Document the devicetree bindings for the deadman timer peripheral found on
Microchip PIC32 SoC class devices.

Signed-off-by: Purna Chandra Mandal <purna.mandal@...rochip.com>
Signed-off-by: Joshua Henderson <joshua.henderson@...rochip.com>
Cc: Ralf Baechle <ralf@...ux-mips.org>
Acked-by: Rob Herring <robh@...nel.org>
---
Note: Please merge this patch series through the MIPS tree.

Changes since v1:
	- Change the example node name to be standard.
---
 .../bindings/watchdog/microchip,pic32-dmt.txt      |   19 +++++++++++++++++++
 1 file changed, 19 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt

diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
new file mode 100644
index 0000000..852f694
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt
@@ -0,0 +1,19 @@
+* Microchip PIC32 Deadman Timer
+
+The deadman timer is used to reset the processor in the event of a software
+malfunction. It is a free-running instruction fetch timer, which is clocked
+whenever an instruction fetch occurs until a count match occurs.
+
+Required properties:
+- compatible: must be "microchip,pic32mzda-dmt".
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- clocks: phandle of parent clock (should be &PBCLK7).
+
+Example:
+
+	watchdog@...00a00 {
+		compatible = "microchip,pic32mzda-dmt";
+		reg = <0x1f800a00 0x80>;
+		clocks = <&PBCLK7>;
+	};
-- 
1.7.9.5