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Message-ID: <1a7b0c205b074613d7b7080742712669@agner.ch>
Date: Thu, 25 Feb 2016 16:00:07 -0800
From: Stefan Agner <stefan@...er.ch>
To: dri-devel@...ts.freedesktop.org
Cc: airlied@...ux.ie, daniel.vetter@...ll.ch,
jianwei.wang.chn@...il.com, alison.wang@...escale.com,
meng.yi@....com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/2] drm/fsl-dcu: fix register initialization
On 2016-02-02 17:06, Stefan Agner wrote:
> The layer enumeration start with 0 (0-15 for LS1021a and 0-63 for
> Vybrid) whereas the register enumeration start from 1 (1-10 for
> LS1021a and 1-9 for Vybrid). The loop started off from 0 for both
> iterations and initialized the number of layers inclusive, which
> is one layer too many.
>
> All extensively written registers seem to be unassigned, it seems
> that the write to those registers did not do any harm in practice.
>
> Signed-off-by: Stefan Agner <stefan@...er.ch>
Applied.
> ---
> This two patches apply cleanly on top of my earlier DCU fixes
>
> patchset:
>
> https://lkml.org/lkml/2015/11/18/953
>
> Changes since v1:
> - (none)
>
> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
> b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
> index db69725..3c92889 100644
> --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
> +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c
> @@ -169,8 +169,8 @@ int fsl_dcu_drm_crtc_create(struct
> fsl_dcu_drm_device *fsl_dev)
> reg_num = LS1021A_LAYER_REG_NUM;
> else
> reg_num = VF610_LAYER_REG_NUM;
> - for (i = 0; i <= fsl_dev->soc->total_layer; i++) {
> - for (j = 0; j < reg_num; j++)
> + for (i = 0; i < fsl_dev->soc->total_layer; i++) {
> + for (j = 1; j <= reg_num; j++)
> regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(i, j), 0);
> }
> regmap_update_bits(fsl_dev->regmap, DCU_DCU_MODE,
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