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Message-ID: <20160301181404.GA6356@twins.programming.kicks-ass.net>
Date: Tue, 1 Mar 2016 19:14:04 +0100
From: Peter Zijlstra <peterz@...radead.org>
To: Jiri Olsa <jolsa@...hat.com>
Cc: Andi Kleen <andi@...stfloor.org>,
"Liang, Kan" <kan.liang@...el.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Ingo Molnar <mingo@...nel.org>,
Stephane Eranian <eranian@...gle.com>,
Wang Nan <wangnan0@...wei.com>,
"zheng.z.yan@...el.com" <zheng.z.yan@...el.com>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [BUG] Core2 cpu triggers hard lockup with perf test
On Tue, Mar 01, 2016 at 07:04:40PM +0100, Jiri Olsa wrote:
> > That's the PERF_GLOBAL_CTRL, right? But it must have succeeded,
>
> yep, should be this one:
>
> static void __intel_pmu_enable_all(int added, bool pmi)
> {
> struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>
> intel_pmu_pebs_enable_all();
> intel_pmu_lbr_enable_all(pmi);
> >>> wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL,
> x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask);
>
>
> > otherwise the NMI watchdog would never have fired.
>
> so NMI wouldn't trigger if CPU is inside wrmsr?
Well, anything goes with MSR writes, that's all a magic heap of
micro-code.
But at the very least it did actually enable the counters, otherwise the
counter used for the NMI watchdog could not fire, it too would still be
disabled.
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