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Message-ID: <20160302033833.GV18327@sirena.org.uk>
Date:	Wed, 2 Mar 2016 12:38:33 +0900
From:	Mark Brown <broonie@...nel.org>
To:	Laxman Dewangan <ldewangan@...dia.com>
Cc:	Bjorn Andersson <bjorn.andersson@...aro.org>, robh+dt@...nel.org,
	pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, lgirdwood@...il.com,
	bjorn.andersson@...ymobile.com, swarren@...dotorg.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2] regulator: DT: Add support to scale ramp delay based
 on platform behavior

On Tue, Mar 01, 2016 at 09:18:46AM +0530, Laxman Dewangan wrote:

> HW team characterize the board and its rail and come up with the following
> data:
> - Configure PMIC to 27mV/us for ramp time.
> - With this measured value of ramp on board is 10mV/us and it is safe to
> assume 5mv/us to consider the board variations.

> So we have now two input from HW team:
> 1. What should be configure in PMIC.
> 2. And for calculation, how much ramp need to be consider.

> For (1), it is 25mV/us and for (2) which 540% (27 *100/5).

> Currently, we can provide the 27mv/us as ramp-delay but do not have option
> for scaling it.

You're not trying to scale the value here, you're trying to replace the
value because the PMIC is incapable of delivering the advertised ramp
rate.  Trying to express this as a multiple of the advertised ramp rate
is just adding complexity.

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