linux-kernel - [PATCH V3 0/5] Updates to EDAC and AMD MCE driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [thread-next>] [day] [month] [year] [list]

Date:	Thu, 3 Mar 2016 10:10:53 -0600
From:	Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
To:	<bp@...en8.de>, <tony.luck@...el.com>, <hpa@...or.com>,
	<mingo@...hat.com>, <tglx@...utronix.de>,
	<dougthompson@...ssion.com>, <mchehab@....samsung.com>
CC:	<x86@...nel.org>, <linux-edac@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>, <ashok.raj@...el.com>,
	<gong.chen@...ux.intel.com>, <len.brown@...el.com>,
	<peterz@...radead.org>, <ak@...ux.intel.com>,
	<alexander.shishkin@...ux.intel.com>, <Yazen.Ghannam@....com>
Subject: [PATCH V3 0/5] Updates to EDAC and AMD MCE driver

This patchset mainly provides necessary EDAC bits to decode errors
occuring on Scalable MCA enabled processors and also updates AMD MCE
driver to program the correct MCx_MISC register address for upcoming
processors.

Patches 1, 2 and 3 are for upcoming processor.

Patches 4 and 5 are either fixing or adding comments to help in
understanding the code and do not introduce any functional changes.

Patch 1: Move MSR definition to mce.h
Patch 2: Updates to EDAC driver to decode the new error signatures
Patch 3: Fix logic to obtain correct block address
Patch 4: Fix deferred error comment
Patch 5: Add comments to amd_nb.h to describe threshold_block structure

Note 1: Introduced new patch for moving MCx_CONFIG MSR to mce.h
Note 2: The enums, amd_hwids[], and string arrays amd_core_mcablock_names[],
	amd_df_mcablock_names[] are placed in arch/x86 as there are
	follow-up patches which use them here.

Changes from V1: (per Boris suggestions)
  - Simplify error decoding routines
  - Move headers to mce.h
  - Rename enumerations and struct members (to be more descriptive)
  - Drop gerund usage
  - Remove comments that are spelling out the code

Changes from V2: (per Boris suggestions)
  - Incorporated all changes as suggested by Boris from here-
    - http://marc.info/?l=linux-kernel&m=145691594921586&w=2
    - http://marc.info/?l=linux-kernel&m=145691606221610&w=2
    - http://marc.info/?l=linux-kernel&m=145691610421627&w=2
  - No functional change is introduced

Aravind Gopalakrishnan (5):
  x86/mce: Move MCx_CONFIG MSR definition
  EDAC, MCE, AMD: Enable error decoding of Scalable MCA errors
  x86/mce/AMD: Fix logic to obtain block address
  x86/mce: Clarify comments regarding deferred error
  x86/mce/AMD: Add comments for easier understanding

 arch/x86/include/asm/amd_nb.h        |  18 +-
 arch/x86/include/asm/mce.h           |  69 +++++++-
 arch/x86/include/asm/msr-index.h     |   4 -
 arch/x86/kernel/cpu/mcheck/mce_amd.c | 127 +++++++++----
 drivers/edac/mce_amd.c               | 334 ++++++++++++++++++++++++++++++++++-
 5 files changed, 501 insertions(+), 51 deletions(-)

-- 
2.7.0