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Date: Thu, 3 Mar 2016 20:50:40 +0100
From: Stephane Eranian <eranian@...gle.com>
To: linux-kernel@...r.kernel.org
Cc: acme@...hat.com, peterz@...radead.org, mingo@...e.hu,
ak@...ux.intel.com, kan.liang@...el.com, jolsa@...hat.com,
namhyung@...nel.org, adrian.hunter@...el.com
Subject: [PATCH 1/3] perf/x86/intel: add definition for PT PMI bit
This patch adds a definition for GLOBAL_OVFL_STATUS bit 55
which is used with the Processor Trace (PT) feature.
Signed-off-by: Stephane Eranian <eranian@...gle.com>
---
arch/x86/include/asm/perf_event.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h
index 7bcb861..5a2ed3e 100644
--- a/arch/x86/include/asm/perf_event.h
+++ b/arch/x86/include/asm/perf_event.h
@@ -165,6 +165,7 @@ struct x86_pmu_capability {
#define GLOBAL_STATUS_ASIF BIT_ULL(60)
#define GLOBAL_STATUS_COUNTERS_FROZEN BIT_ULL(59)
#define GLOBAL_STATUS_LBRS_FROZEN BIT_ULL(58)
+#define GLOBAL_STATUS_TRACE_TOPAPMI BIT_ULL(55)
/*
* IBS cpuid feature detection
--
2.5.0
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