linux-kernel - Re: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation

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Message-ID: <20160305020430.GL55664@google.com>
Date:	Fri, 4 Mar 2016 18:04:30 -0800
From:	Brian Norris <computersforpeace@...il.com>
To:	Roger Quadros <rogerq@...com>
Cc:	tony@...mide.com, dwmw2@...radead.org,
	ezequiel@...guardiasur.com.ar, javier@...hile0.org, fcooper@...com,
	nsekhar@...com, linux-mtd@...ts.infradead.org,
	linux-omap@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Boris Brezillon <boris.brezillon@...e-electrons.com>
Subject: Re: [PATCH v5 10/26] mtd: nand: omap: Update DT binding documentation

On Fri, Feb 19, 2016 at 11:15:32PM +0200, Roger Quadros wrote:
> Add compatible id and interrupts. The NAND interrupts are
> provided by the GPMC controller node.
> 
> Signed-off-by: Roger Quadros <rogerq@...com>
> ---
>  Documentation/devicetree/bindings/mtd/gpmc-nand.txt | 17 +++++++++++++----
>  1 file changed, 13 insertions(+), 4 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> index fb733c4..810b87b 100644
> --- a/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> +++ b/Documentation/devicetree/bindings/mtd/gpmc-nand.txt
> @@ -13,7 +13,11 @@ Documentation/devicetree/bindings/mtd/nand.txt
>  
>  Required properties:
>  
> - - reg:		The CS line the peripheral is connected to
> + - compatible:	"ti,omap2-nand"
> + - reg:		range id (CS number), base offset and length of the
> +		NAND I/O space

Is it normal to mix types of addressing in a single 'reg' property? Is
your code working for anything besides CS==0?

Brian

> + - interrupt-parent: must point to gpmc node
> + - interrupts:	Two interrupt specifiers, one for fifoevent, one for termcount.
>  
>  Optional properties:
>  
> @@ -55,20 +59,25 @@ Example for an AM33xx board:
>  	gpmc: gpmc@...00000 {
>  		compatible = "ti,am3352-gpmc";
>  		ti,hwmods = "gpmc";
> -		reg = <0x50000000 0x1000000>;
> +		reg = <0x50000000 0x36c>;
>  		interrupts = <100>;
>  		gpmc,num-cs = <8>;
>  		gpmc,num-waitpins = <2>;
>  		#address-cells = <2>;
>  		#size-cells = <1>;
> -		ranges = <0 0 0x08000000 0x2000>;	/* CS0: NAND */
> +		ranges = <0 0 0x08000000 0x1000000>;	/* CS0 space, 16MB */
>  		elm_id = <&elm>;
>  
>  		nand@0,0 {
> -			reg = <0 0 0>; /* CS0, offset 0 */
> +			compatible = "ti,omap2-nand";
> +			reg = <0 0 4>;		/* CS0, offset 0, NAND I/O window 4 */
> +			interrupt-parent = <&gpmc>;
> +			interrupts = <0 IRQ_TYPE_NONE>, <1 IRQ_TYPE NONE>;
>  			nand-bus-width = <16>;
>  			ti,nand-ecc-opt = "bch8";
>  			ti,nand-xfer-type = "polled";
> +			interrupt-parent = <&gpmc>;
> +			interrupts = <0>, <1>;
>  
>  			gpmc,sync-clk-ps = <0>;
>  			gpmc,cs-on-ns = <0>;
> -- 
> 2.1.4
>