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Message-ID: <56DCDD1B.5050708@amd.com>
Date:	Mon, 7 Mar 2016 08:44:59 +0700
From:	Suravee Suthikulpanit <Suravee.Suthikulpanit@....com>
To:	Joerg Roedel <joro@...tes.org>
CC:	<bp@...en8.de>, <peterz@...radead.org>, <mingo@...hat.com>,
	<acme@...nel.org>, <andihartmann@...enet.de>, <vw@...mu.org>,
	<labbott@...hat.com>, <linux-kernel@...r.kernel.org>,
	<iommu@...ts.linux-foundation.org>
Subject: Re: [PATCH V5 00/10] perf/amd/iommu: Enable multi-IOMMU support

Hi Joerg,

On 2/25/16 21:54, Joerg Roedel wrote:
> Hi Suravee,
>
> On Tue, Feb 23, 2016 at 08:12:34AM -0600, Suravee Suthikulpanit wrote:
>> This is a two-part patch series:
>>
>> Part1: 1-4 :
>> Introduce a workaround for the current AMD IOMMU perf initialization issue
>> in some existing KV and CZ platforms, where it fails to write to IOMMU
>> perf counter as reported by Andreas Hartmann here
>> (http://comments.gmane.org/gmane.linux.kernel.pci/49147).
>
> Okay, these 4 patches fix the issue, but they also refactor the code and
> so a lot more. They are not suitable for stable kernels, so to just fix
> the issue I take the small patch I extracted from yours and posted
> previously. I retains your authorship, hope that is fine with you.
>
> You can rebase these patches on-top of that minimal fix.
>
>
> 	Joerg
>

I'll do that and send out V6.

Thanks,
Suravee

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