linux-kernel - Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller support

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Message-ID: <20160307095021.7f9f7484@arm.com>
Date:	Mon, 7 Mar 2016 09:50:21 +0000
From:	Marc Zyngier <marc.zyngier@....com>
To:	Minghuan Lian <Minghuan.Lian@....com>
Cc:	<linux-arm-kernel@...ts.infradead.org>,
	<linux-kernel@...r.kernel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jason Cooper <jason@...edaemon.net>,
	Roy Zang <roy.zang@....com>, Mingkai Hu <mingkai.hu@....com>,
	Stuart Yoder <stuart.yoder@....com>,
	Yang-Leo Li <leoyang.li@....com>,
	Rob Herring <robh+dt@...nel.org>,
	Mark Rutland <Mark.Rutland@....com>
Subject: Re: [PATCH 2/2 v5] irqchip/Layerscape: Add SCFG MSI controller
 support

On Mon, 7 Mar 2016 11:36:22 +0800
Minghuan Lian <Minghuan.Lian@....com> wrote:

> Some kind of NXP Layerscape SoC provides a MSI
> implementation which uses two SCFG registers MSIIR and
> MSIR to support 32 MSI interrupts for each PCIe controller.
> The patch is to support it.
> 
> Signed-off-by: Minghuan Lian <Minghuan.Lian@....com>

Acked-by: Marc Zyngier <marc.zyngier@....com>

The DT binding still needs an Ack from the DT maintainers though (cc'd).

	M.
-- 
Jazz is not dead. It just smells funny.