lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <1457365136-23332-1-git-send-email-shawn.lin@rock-chips.com>
Date:	Mon,  7 Mar 2016 23:38:56 +0800
From:	Shawn Lin <shawn.lin@...k-chips.com>
To:	Adrian Hunter <adrian.hunter@...el.com>,
	Ulf Hansson <ulf.hansson@...aro.org>
Cc:	Michal Simek <michal.simek@...inx.com>, soren.brinkmann@...inx.com,
	Rob Herring <robh+dt@...nel.org>, linux-mmc@...r.kernel.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	Shawn Lin <shawn.lin@...k-chips.com>
Subject: [PATCH v7 2/4] mmc: sdhci-of-arasan: remove disable clk_ahb from sdhci_arasan_resume

We don't really need disable clk_ahb when failing to resume. Otherwise
we may take risk of bus error for accessing register without clk_ahb.

Signed-off-by: Shawn Lin <shawn.lin@...k-chips.com>
---

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 drivers/mmc/host/sdhci-of-arasan.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c
index 1e4b5e0..ae8052d 100644
--- a/drivers/mmc/host/sdhci-of-arasan.c
+++ b/drivers/mmc/host/sdhci-of-arasan.c
@@ -118,7 +118,6 @@ static int sdhci_arasan_resume(struct device *dev)
 	ret = clk_enable(pltfm_host->clk);
 	if (ret) {
 		dev_err(dev, "Cannot enable SD clock.\n");
-		clk_disable(sdhci_arasan->clk_ahb);
 		return ret;
 	}
 
-- 
2.3.7


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ