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Date: Tue, 8 Mar 2016 16:01:45 +0700 From: Linus Walleij <linus.walleij@...aro.org> To: Henry Paulissen <henry@...ronetworks.nl> Cc: linux-sunxi <linux-sunxi@...glegroups.com>, Maxime Ripard <maxime.ripard@...e-electrons.com>, Chen-Yu Tsai <wens@...e.org>, Hongzhou Yang <hongzhou.yang@...iatek.com>, Fabian Frederick <fabf@...net.be>, Patrice Chotard <patrice.chotard@...com>, "open list:PIN CONTROL SUBSYSTEM" <linux-gpio@...r.kernel.org>, "moderated list:ARM/Allwinner sunXi SoC support" <linux-arm-kernel@...ts.infradead.org>, open list <linux-kernel@...r.kernel.org> Subject: Re: [PATCH 1/2] pinctrl: sunxi: Remove non existing irq's On Mon, Feb 29, 2016 at 6:13 AM, Henry Paulissen <henry@...ronetworks.nl> wrote: > While I was testing irq's on the cubietruck I found a couple of > not working irq pins. Further diving into the problem it opened > up a mess called "manual". > > This so called manual (A20 user manual v1.3 dated 2014-10-10) says: > > Pin overview: > Page 233: EINT12 is on pin PC19 mux6. > Page 236: EINT12 is on pin PH12 mux6. > > Now, it is a bit strange to have the same IRQ on 2 different pins, > but I guess this could still be possible hardware wise. But then: > > Pin registers: > Page 253: EINT12 is *not* on pin PC19. > Page 281: EINT12 is on pin PH12. > > The manual is so contradicting that further tests had to be made > to see which of the 2 statements where correct. > > This patch is based on actual outcome of these tests and not what > the manual says. > > Test procedure used: > > Connect a 1 pulse per second (GPS) line to the pin. > > echo pin### > /sys/class/gpio/export > echo in > /sys/class/gpio/gpio###/direction > echo rising > /sys/class/gpio/gpio###/edge > > Check /proc/interrupts if a irq was attached and if irq's where > received. > > Signed-off-by: Henry Paulissen <henry@...ronetworks.nl> Patch applied with Maxime's ACK. Yours, Linus Walleij
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