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Message-ID: <20160308104628.6224bde2@bbrezillon>
Date:	Tue, 8 Mar 2016 10:46:28 +0100
From:	Boris Brezillon <boris.brezillon@...e-electrons.com>
To:	Jiancheng Xue <xuejiancheng@...wei.com>
Cc:	Brian Norris <computersforpeace@...il.com>, <robh+dt@...nel.org>,
	<pawel.moll@....com>, <mark.rutland@....com>,
	<ijc+devicetree@...lion.org.uk>, <galak@...eaurora.org>,
	<dwmw2@...radead.org>, <zajec5@...il.com>, <jteki@...nedev.com>,
	<ezequiel@...guardiasur.com.ar>, <juhosg@...nwrt.org>,
	<shijie.huang@...el.com>, <mika.westerberg@...ux.intel.com>,
	<furquan@...gle.com>, <han.xu@...escale.com>,
	<fabio.estevam@...escale.com>, <manabian@...il.com>,
	<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-mtd@...ts.infradead.org>, <yanhaifeng@...ilicon.com>,
	<yanghongwei@...ilicon.com>, <suwenping@...ilicon.com>,
	<raojun@...ilicon.com>, <ml.yang@...ilicon.com>,
	<gaofei@...ilicon.com>, <zhangzhenxing@...ilicon.com>,
	<xuejiancheng@...ilicon.com>, Binquan Peng <pengbinquan@...wei.com>
Subject: Re: [RESEND PATCH v7] mtd: spi-nor: add hisilicon spi-nor flash
 controller driver

On Tue, 8 Mar 2016 17:25:13 +0800
Jiancheng Xue <xuejiancheng@...wei.com> wrote:

> Hi Brian,
>    Thank you very much for your comments.
> 
> On 2016/3/8 6:52, Brian Norris wrote:
> [...]
> >>
> >> diff --git a/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> >> new file mode 100644
> >> index 0000000..7407147
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
> > 
> > This is not a SPI controller (or is it? it looks like a SPI NOR
> > controller that doesn't do generic SPI), so it shouldn't go in the spi/
> > directory.
> > 
> OK. I'll move this file into Documentation/devicetree/bindings/mtd.
> 
> >> @@ -0,0 +1,25 @@
> >> +HiSilicon SPI-NOR Flash Controller
> >> +
> >> +Required properties:
> >> +- compatible : Should be "hisilicon,hisi-sfc" and one of the following strings:
> >> +		"hisilicon,hi3519-sfc"
> >> +- address-cells : number of cells required to define a chip select
> >> +        address on the SPI bus. Should be set to 1. See spi-bus.txt.
> > 
> > This is not exactly a typical SPI bus, though I suppose some of that
> > documentation could apply...
> > 
> 
> OK. I'll modify the description.
> 
> [...]
> >> +static int hisi_spi_nor_read_reg(struct spi_nor *nor, u8 opcode, u8 *buf,
> >> +		int len)
> >> +{
> >> +	struct hifmc_priv *priv = nor->priv;
> >> +	struct hifmc_host *host = priv->host;
> >> +	int ret;
> >> +
> >> +	ret = hisi_spi_nor_send_cmd(nor, opcode, len);
> >> +	if (ret)
> >> +		return ret;
> >> +
> >> +	memcpy(buf, host->iobase, len);
> > 
> > sparse doesn't like any of these memcpy()'s, since that's __iomem. Are
> > you sure you want a regular memcpy here, and elsewhere?
> > 
> It's not a must to use memcpy though host->iobase represents a segment of inner memory
> which stores data from flash device byte by byte.  I will give up using memcpy here and
> hisi_spi_nor_write_reg() in next version. Thank you!

Or you can use memcpy_fromio(), which should give you better perfs than
using readX() accessors in a loop.


-- 
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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