linux-kernel - [tip:ras/core] x86/mce: Clarify comments regarding deferred error

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Message-ID: <tip-2cd3b5f9033f0b051842a279dac5a54271cbd3c8@git.kernel.org>
Date:	Tue, 8 Mar 2016 05:14:07 -0800
From:	tip-bot for Aravind Gopalakrishnan <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	hpa@...or.com, torvalds@...ux-foundation.org,
	Aravind.Gopalakrishnan@....com, tony.luck@...el.com,
	linux-edac@...r.kernel.org, tglx@...utronix.de,
	peterz@...radead.org, mingo@...nel.org, bp@...en8.de, bp@...e.de,
	linux-kernel@...r.kernel.org
Subject: [tip:ras/core] x86/mce: Clarify comments regarding deferred error

Commit-ID:  2cd3b5f9033f0b051842a279dac5a54271cbd3c8
Gitweb:     http://git.kernel.org/tip/2cd3b5f9033f0b051842a279dac5a54271cbd3c8
Author:     Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
AuthorDate: Mon, 7 Mar 2016 14:02:20 +0100
Committer:  Ingo Molnar <mingo@...nel.org>
CommitDate: Tue, 8 Mar 2016 11:48:15 +0100

x86/mce: Clarify comments regarding deferred error

Deferred errors indicate errors that hardware could not fix. But it
still does not cause any interruption to program flow. So it does not
generate any #MC and UC bit in MCx_STATUS is not set.

Correct comment.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@....com>
Signed-off-by: Borislav Petkov <bp@...e.de>
Cc: Borislav Petkov <bp@...en8.de>
Cc: Linus Torvalds <torvalds@...ux-foundation.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Tony Luck <tony.luck@...el.com>
Cc: linux-edac <linux-edac@...r.kernel.org>
Link: http://lkml.kernel.org/r/1457021458-2522-5-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Ingo Molnar <mingo@...nel.org>
---
 arch/x86/include/asm/mce.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index 72f8688..cfff341 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -40,7 +40,7 @@
 #define MCI_STATUS_AR	 (1ULL<<55)  /* Action required */
 
 /* AMD-specific bits */
-#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* declare an uncorrected error */
+#define MCI_STATUS_DEFERRED	(1ULL<<44)  /* uncorrected error, deferred exception */
 #define MCI_STATUS_POISON	(1ULL<<43)  /* access poisonous data */
 #define MCI_STATUS_TCC		(1ULL<<55)  /* Task context corrupt */