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Message-ID: <20160308160419.GA28531@gmail.com>
Date: Tue, 8 Mar 2016 17:04:19 +0100
From: Ingo Molnar <mingo@...nel.org>
To: Borislav Petkov <bp@...en8.de>
Cc: Thomas Gleixner <tglx@...utronix.de>,
linux-tip-commits@...r.kernel.org, torvalds@...ux-foundation.org,
eranian@...gle.com, harish.chegondi@...el.com, acme@...hat.com,
jolsa@...hat.com, peterz@...radead.org, hpa@...or.com,
andi.kleen@...el.com, vincent.weaver@...ne.edu,
kan.liang@...el.com, jacob.jun.pan@...ux.intel.com,
linux-kernel@...r.kernel.org
Subject: Re: [tip:perf/core] perf/x86/intel/rapl: Sanitize the quirk handling
* Borislav Petkov <bp@...en8.de> wrote:
> On Mon, Feb 29, 2016 at 03:10:28AM -0800, tip-bot for Thomas Gleixner wrote:
> > Commit-ID: b8b3319a471b2df35ae0a8fe94223638468e9ca4
> > Gitweb: http://git.kernel.org/tip/b8b3319a471b2df35ae0a8fe94223638468e9ca4
> > Author: Thomas Gleixner <tglx@...utronix.de>
> > AuthorDate: Mon, 22 Feb 2016 22:19:22 +0000
> > Committer: Ingo Molnar <mingo@...nel.org>
> > CommitDate: Mon, 29 Feb 2016 09:35:22 +0100
> >
> > perf/x86/intel/rapl: Sanitize the quirk handling
> >
> > There is no point in having a quirk machinery for a single possible
> > function. Get rid of it and move the quirk to a place where it actually
> > makes sense.
>
> I guess you can simplify this even more by even getting rid of that
> quirk function pointer funkyness and simply tell rapl_check_hw_unit() to
> apply the quirk.
>
> Diff ontop of yours:
>
> ---
> diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
> index 019e541fa988..0b72976bab35 100644
> --- a/arch/x86/events/intel/rapl.c
> +++ b/arch/x86/events/intel/rapl.c
> @@ -592,18 +592,7 @@ static int rapl_cpu_notifier(struct notifier_block *self,
> return NOTIFY_OK;
> }
>
> -static __init void rapl_hsw_server_quirk(void)
> -{
> - /*
> - * DRAM domain on HSW server has fixed energy unit which can be
> - * different than the unit from power unit MSR.
> - * "Intel Xeon Processor E5-1600 and E5-2600 v3 Product Families, V2
> - * of 2. Datasheet, September 2014, Reference Number: 330784-001 "
> - */
> - rapl_hw_unit[RAPL_IDX_RAM_NRG_STAT] = 16;
> -}
> -
> -static int rapl_check_hw_unit(void (*quirk)(void))
> +static int rapl_check_hw_unit(bool apply_quirk)
> {
> u64 msr_rapl_power_unit_bits;
> int i;
> @@ -614,9 +603,14 @@ static int rapl_check_hw_unit(void (*quirk)(void))
> for (i = 0; i < NR_RAPL_DOMAINS; i++)
> rapl_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
>
> - /* Apply cpu model quirk */
> - if (quirk)
> - quirk();
> + /*
> + * DRAM domain on HSW server has fixed energy unit which can be
> + * different than the unit from power unit MSR.
> + * "Intel Xeon Processor E5-1600 and E5-2600 v3 Product Families, V2
> + * of 2. Datasheet, September 2014, Reference Number: 330784-001 "
> + */
> + if (apply_quirk)
> + rapl_hw_unit[RAPL_IDX_RAM_NRG_STAT] = 16;
>
> /*
> * Calculate the timer rate:
> @@ -704,7 +698,7 @@ static const struct x86_cpu_id rapl_cpu_match[] __initconst = {
>
> static int __init rapl_pmu_init(void)
> {
> - void (*quirk)(void) = NULL;
> + bool apply_quirk = false;
> int ret;
>
> if (!x86_match_cpu(rapl_cpu_match))
> @@ -717,7 +711,7 @@ static int __init rapl_pmu_init(void)
> rapl_pmu_events_group.attrs = rapl_events_cln_attr;
> break;
> case 63: /* Haswell-Server */
> - quirk = rapl_hsw_server_quirk;
> + apply_quirk = true;
> rapl_cntr_mask = RAPL_IDX_SRV;
> rapl_pmu_events_group.attrs = rapl_events_srv_attr;
> break;
> @@ -733,7 +727,7 @@ static int __init rapl_pmu_init(void)
> rapl_pmu_events_group.attrs = rapl_events_srv_attr;
> break;
> case 87: /* Knights Landing */
> - quirk = rapl_hsw_server_quirk;
> + apply_quirk = true;
> rapl_cntr_mask = RAPL_IDX_KNL;
> rapl_pmu_events_group.attrs = rapl_events_knl_attr;
> break;
> @@ -741,7 +735,7 @@ static int __init rapl_pmu_init(void)
> return -ENODEV;
> }
>
> - ret = rapl_check_hw_unit(quirk);
> + ret = rapl_check_hw_unit(apply_quirk);
> if (ret)
> return ret;
Please send a patch with a changelog so it can be applied.
Thanks!
Ingo
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