linux-kernel - Re: [PATCH v3 3/7] clk: rockchip: add more mux parameters for new pll sources

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Date:	Wed, 09 Mar 2016 17:50:17 +0100
From:	Heiko Stübner <heiko@...ech.de>
To:	Xing Zheng <zhengxing@...k-chips.com>
Cc:	linux-rockchip@...ts.infradead.org, huangtao@...k-chips.com,
	jay.xu@...k-chips.com, elaine.zhang@...k-chips.com,
	dianders@...omium.org, Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>, linux-clk@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/7] clk: rockchip: add more mux parameters for new pll sources

Am Mittwoch, 9. März 2016, 10:37:03 schrieb Xing Zheng:
> Thers are only two parent PLLs that APLL and GPLL for core on the
> previous SoCs (RK3066/RK3188/RK3288/RK3368). Hence, we set fixed
> GPLL as alternate parent when core is switching freq.
> 
> Since RK3399 big.LITTLE architecture, we need to select and adapt
> more PLLs (ALPLL/ABPLL/DPLL/GPLL) sources.
> 
> Signed-off-by: Xing Zheng <zhengxing@...k-chips.com>

applied to my clk-branch for v4.7, with an adapted subject of
"clk: rockchip: allow varying mux parameters for cpuclk pll-sources"


Thanks
Heiko