linux-kernel - [PATCH v1 3/4] ARM: dts: vfxxx: Add OCROM and phandle entries for Vybrid SoC bus driver

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Date:	Fri, 11 Mar 2016 14:29:30 +0530
From:	Sanchayan Maity <maitysanchayan@...il.com>
To:	arnd@...db.de, shawnguo@...nel.org
Cc:	stefan@...er.ch, robh+dt@...nel.org, lee.jones@...aro.org,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Sanchayan Maity <maitysanchayan@...il.com>
Subject: [PATCH v1 3/4] ARM: dts: vfxxx: Add OCROM and phandle entries for Vybrid SoC bus driver

Add OCROM node and introduce phandles to OCROM, MSCM and NVMEM
OCOTP for use by the Vybrid SoC bus driver.

Signed-off-by: Sanchayan Maity <maitysanchayan@...il.com>
---
 arch/arm/boot/dts/vfxxx.dtsi | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/vfxxx.dtsi b/arch/arm/boot/dts/vfxxx.dtsi
index db9157e..0dd7ad5 100644
--- a/arch/arm/boot/dts/vfxxx.dtsi
+++ b/arch/arm/boot/dts/vfxxx.dtsi
@@ -87,9 +87,19 @@
 	soc {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		compatible = "simple-bus";
+		compatible = "fsl,vf610-soc-bus", "simple-bus";
 		interrupt-parent = <&mscm_ir>;
 		ranges;
+		fsl,rom-revision = <&ocrom 0x80>;
+		fsl,cpu-count = <&mscm_cpucfg 0x2C>;
+		fsl,l2-size = <&mscm_cpucfg 0x14>;
+		nvmem-cells = <&ocotp_cfg0>, <&ocotp_cfg1>;
+		nvmem-cell-names = "cfg0", "cfg1";
+
+		ocrom: ocrom@...00000 {
+			compatible = "fsl,vf610-ocrom", "syscon";
+			reg = <0x00000000 0x18000>;
+		};
 
 		aips0: aips-bus@...00000 {
 			compatible = "fsl,aips-bus", "simple-bus";
-- 
2.7.2