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Message-ID: <20160312162900.GA18808@gmail.com>
Date:	Sat, 12 Mar 2016 17:29:01 +0100
From:	Ingo Molnar <mingo@...nel.org>
To:	Fenghua Yu <fenghua.yu@...el.com>
Cc:	"H. Peter Anvin" <hpa@...ux.intel.com>,
	Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ravi V Shankar <ravi.v.shankar@...el.com>,
	Dave Hansen <dave.hansen@...el.com>,
	Gleb Natapov <gleb@...nel.org>,
	Paolo Bonzini <pbonzini@...hat.com>,
	linux-kernel <linux-kernel@...r.kernel.org>,
	x86 <x86@...nel.org>, kvm@...r.kernel.org,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	"H. Peter Anvin" <hpa@...or.com>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Andy Lutomirski <luto@...nel.org>,
	Borislav Petkov <bp@...en8.de>
Subject: Re: [PATCH v3] x86/cpufeatures.h: Enable A Few New AVX-512 Features


* Fenghua Yu <fenghua.yu@...el.com> wrote:

> +#define X86_FEATURE_AVX512DQ	( 9*32+17) /* AVX-512 DQ Instructions */
> +#define X86_FEATURE_AVX512BW	( 9*32+30) /* AVX-512 BW Instructions */
> +#define X86_FEATURE_AVX512VL	( 9*32+31) /* AVX-512 Vector Lengths */

Yeah, so I don't think it's obvious to people what the DQ/BW/VL extensions are 
precisely, so I changed the text to the following, a bit more verbose 
descriptions:

  #define X86_FEATURE_AVX512DQ  ( 9*32+17) /* AVX-512 DQ (Double/Quad granular) Instructions */
  #define X86_FEATURE_AVX512BW	( 9*32+30) /* AVX-512 BW (Byte/Word granular) Instructions */
  #define X86_FEATURE_AVX512VL	( 9*32+31) /* AVX-512 VL (128/256 Vector Length) Extensions */

Please holler if you disagree!

Thanks,

	Ingo

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