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Message-Id: <1457942520-12859-8-git-send-email-wxt@rock-chips.com>
Date:	Mon, 14 Mar 2016 16:01:58 +0800
From:	Caesar Wang <wxt@...k-chips.com>
To:	Heiko Stuebner <heiko@...ech.de>,
	"David S. Miller" <davem@...emloft.net>,
	Rob Herring <robh+dt@...nel.org>
Cc:	linux-rockchip@...ts.infradead.org, keescook@...gle.com,
	leozwang@...gle.com, sergei.shtylyov@...entembedded.com,
	netdev@...r.kernel.org, Xing Zheng <zhengxing@...k-chips.com>,
	Caesar Wang <wxt@...k-chips.com>,
	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>, linux-clk@...r.kernel.org,
	Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH v3 7/9] clk: rockchip: add clock-id for rk3036 emac pll source clock

From: Xing Zheng <zhengxing@...k-chips.com>

Suitable PLLs for the emac on the rk3036 are difficult to find
and one of them is the (continuously changing) APLL. So in most
cases it will be necessary to select a PLL manually.
So add a clock-id for it.

Signed-off-by: Xing Zheng <zhengxing@...k-chips.com>
Signed-off-by: Caesar Wang <wxt@...k-chips.com>
Cc: Xing Zheng <zhengxing@...k-chips.com>
Cc: Michael Turquette <mturquette@...libre.com>
Cc: Heiko Stuebner <heiko@...ech.de>
Cc: Stephen Boyd <sboyd@...eaurora.org>
Cc: linux-clk@...r.kernel.org
Cc: linux-rockchip@...ts.infradead.org

---

Changes in v3:
- Add the Cc people.

Changes in v2: None

 include/dt-bindings/clock/rk3036-cru.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/clock/rk3036-cru.h b/include/dt-bindings/clock/rk3036-cru.h
index 3396591..de44109 100644
--- a/include/dt-bindings/clock/rk3036-cru.h
+++ b/include/dt-bindings/clock/rk3036-cru.h
@@ -54,6 +54,7 @@
 #define SCLK_PVTM_VIDEO		125
 #define SCLK_MAC		151
 #define SCLK_MACREF		152
+#define SCLK_MACPLL		153
 #define SCLK_SFC		160
 
 /* aclk gates */
-- 
1.9.1

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