linux-kernel - Re: [PATCH v4 1/3] mmc: sdhci: Set DMA mask when adding host

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Message-ID: <2646031.AqmqXYeZyr@wuerfel>
Date:	Wed, 16 Mar 2016 11:05:34 +0100
From:	Arnd Bergmann <arnd@...db.de>
To:	Adrian Hunter <adrian.hunter@...el.com>
Cc:	Alexandre Courbot <acourbot@...dia.com>,
	Ulf Hansson <ulf.hansson@...aro.org>,
	linux-mmc@...r.kernel.org, linux-kernel@...r.kernel.org,
	gnurou@...il.com
Subject: Re: [PATCH v4 1/3] mmc: sdhci: Set DMA mask when adding host

On Wednesday 16 March 2016 11:26:48 Adrian Hunter wrote:
> On 16/03/16 11:07, Arnd Bergmann wrote:
> > On Wednesday 16 March 2016 10:43:33 Adrian Hunter wrote:
> >>> +
> >>> +     /* 32-bit mask as default & fallback */
> >>> +     if (ret) {
> >>> +             ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32));
> >>
> >> What happens if device enumeration (e.g. of_dma_configure) has already set a
> >> more restrictive DMA mask?
> >>
> >>
> > 
> > In this case, dma_set_mask_and_coherent() is supposed to check the
> > bus properties settings again and fail dma_set_mask_and_coherent().
> 
> So the logic this patch introduces will disable DMA in that case.  Would it
> be better just to leave the DMA mask alone (as it does now for most sdhci
> drivers) in the 32-bit case?

It depends to some degree on the specific capabilities of the system.

Basically when the driver asks for a 32-bit mask, we have to check if that
is actually possible, and there are a couple of possible outcomes:

- If the bus is less than 32-bit wide but the RAM is small enough to
  to fit within the addressable range of the bus, the
  dma_set_mask_and_coherent() should succeed

- If the RAM is larger than what the bus can address, but swiotlb
  is configured and the swiotlb bounce buffer is addressable by
  the bus, dma_set_mask_and_coherent() should also succeed

- If there is no swiotlb and there is RAM that fits into the 32-bit
  mask but that is not addressable by the bus, the
  dma_set_mask_and_coherent() should fail, and the driver should not
  use DMA.

- Similarly, if swiotlb is enabled, but its bounce buffer is not
  reachable by the bus, the call needs to fail and the driver must
  not use DMA.

	Arnd