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Message-ID: <56E8D7A0.9070704@nvidia.com>
Date:	Wed, 16 Mar 2016 11:48:48 +0800
From:	Wei Ni <wni@...dia.com>
To:	Eduardo Valentin <edubezval@...il.com>
CC:	<rui.zhang@...el.com>, <thierry.reding@...il.com>,
	<MLongnecker@...dia.com>, <swarren@...dotorg.org>,
	<mikko.perttunen@...si.fi>, <linux-tegra@...r.kernel.org>,
	<linux-pm@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V7 03/12] thermal: tegra: get rid of PDIV/HOTSPOT hack



On 2016年03月16日 03:56, Eduardo Valentin wrote:
> * PGP Signed by an unknown key
> 
> On Tue, Mar 15, 2016 at 02:21:53PM +0800, Wei Ni wrote:
>>
>>
>> On 2016年03月15日 04:05, Eduardo Valentin wrote:
>>>> Old Signed by an unknown key
>>>
>>> On Fri, Mar 11, 2016 at 11:09:14AM +0800, Wei Ni wrote:
>>>> Get rid of T124-specific PDIV/HOTSPOT hack.
>>>> tegra-soctherm.c contained a hack to set the SENSOR_PDIV and
>>>> SENSOR_HOTSPOT_OFFSET registers - it just did two writes of
>>>> T124-specific opaque values.  Convert these into a form that can be
>>>> substituted on a per-chip basis, and into structure fields that have
>>>> at least some independent meaning.
>>>>
>>>> Signed-off-by: Wei Ni <wni@...dia.com>
>>>> ---
>>>>  drivers/thermal/tegra/tegra-soctherm.c | 18 ++++++++++++++----
>>>>  1 file changed, 14 insertions(+), 4 deletions(-)
>>>>
>>>> diff --git a/drivers/thermal/tegra/tegra-soctherm.c b/drivers/thermal/tegra/tegra-soctherm.c
>>>> index b3ec0faa2bee..b4b791ebfbb6 100644
>>>> --- a/drivers/thermal/tegra/tegra-soctherm.c
>>>> +++ b/drivers/thermal/tegra/tegra-soctherm.c
>>>> @@ -48,14 +48,12 @@
>>>>  #define SENSOR_CONFIG2_THERMB_SHIFT		0
>>>>  
>>>>  #define SENSOR_PDIV				0x1c0
>>>> -#define SENSOR_PDIV_T124			0x8888
>>>>  #define SENSOR_PDIV_CPU_MASK			(0xf << 12)
>>>>  #define SENSOR_PDIV_GPU_MASK			(0xf << 8)
>>>>  #define SENSOR_PDIV_MEM_MASK			(0xf << 4)
>>>>  #define SENSOR_PDIV_PLLX_MASK			(0xf << 0)
>>>>  
>>>>  #define SENSOR_HOTSPOT_OFF			0x1c4
>>>> -#define SENSOR_HOTSPOT_OFF_T124			0x00060600
>>>>  #define SENSOR_HOTSPOT_CPU_MASK			(0xff << 16)
>>>>  #define SENSOR_HOTSPOT_GPU_MASK			(0xff << 8)
>>>>  #define SENSOR_HOTSPOT_MEM_MASK			(0xff << 0)
>>>> @@ -436,6 +434,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>>>>  	struct resource *res;
>>>>  	unsigned int i;
>>>>  	int err;
>>>> +	u32 pdiv, hotspot;
>>>>  
>>>>  	const struct tegra_tsensor *tsensors = t124_tsensors;
>>>>  	const struct tegra_tsensor_group **ttgs = tegra124_tsensor_groups;
>>>> @@ -493,8 +492,19 @@ static int tegra_soctherm_probe(struct platform_device *pdev)
>>>>  			goto disable_clocks;
>>>>  	}
>>>>  
>>>> -	writel(SENSOR_PDIV_T124, tegra->regs + SENSOR_PDIV);
>>>> -	writel(SENSOR_HOTSPOT_OFF_T124, tegra->regs + SENSOR_HOTSPOT_OFF);
>>>> +	/* Program pdiv and hotspot offsets per THERM */
>>>> +	pdiv = readl(tegra->regs + SENSOR_PDIV);
>>>> +	hotspot = readl(tegra->regs + SENSOR_HOTSPOT_OFF);
>>>> +	for (i = 0; i < TEGRA124_SOCTHERM_SENSOR_NUM; ++i) {
>>>> +		pdiv = REG_SET_MASK(pdiv, ttgs[i]->pdiv_mask,
>>>> +				    ttgs[i]->pdiv);
>>>> +		if (ttgs[i]->id != TEGRA124_SOCTHERM_SENSOR_PLLX)
>>>> +			hotspot =  REG_SET_MASK(hotspot,
>>>> +						ttgs[i]->pllx_hotspot_mask,
>>>> +						ttgs[i]->pllx_hotspot_diff);
>>>> +	}
>>>> +	writel(pdiv, tegra->regs + SENSOR_PDIV);
>>>> +	writel(hotspot, tegra->regs + SENSOR_HOTSPOT_OFF);
>>>
>>> Is the above logic the same for all supported chips? e.g. do we always
>>> skip pllx for hotspot configuration?
>>
>> Yes, this logic support Tegra124, Tegra210, and Tegra132 which I will send out
>> in next series.
> 
> 
> Ok. Could you please add a comment then explaining why pllx is not
> needed for the hotspot configuration?

This is the hotspot offset from PLLX, so we doesn't need to configure for PLLX,
the Tegra DRM introduced it.
I will add comment for it.

> 
>>
>>>
>>>
>>>>  
>>>>  	/* Initialize thermctl sensors */
>>>>  
>>>> -- 
>>>> 1.9.1
>>>>
>>>
>>> * Unknown Key
>>> * 0x7DA4E256
>>>
> 
> * Unknown Key
> * 0x7DA4E256
> 

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