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Message-ID: <1602932.Q3715QPPaf@avalon>
Date: Thu, 17 Mar 2016 13:18:36 +0200
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Niklas Söderlund
<niklas.soderlund+renesas@...natech.se>
Cc: vinod.koul@...el.com, linux-renesas-soc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
dmaengine@...r.kernel.org, iommu@...ts.linux-foundation.org,
robin.murphy@....com, geert+renesas@...der.be,
linus.walleij@...aro.org, dan.j.williams@...el.com, arnd@...db.de,
linux-arch@...r.kernel.org
Subject: Re: [PATCH v5 1/9] iommu: Add MMIO mapping type
Hi Niklas,
Thank you for the patch.
On Tuesday 08 March 2016 03:42:46 Niklas Söderlund wrote:
> From: Robin Murphy <robin.murphy@....com>
>
> On some platforms, MMIO regions might need slightly different treatment
> compared to mapping regular memory; add the notion of MMIO mappings to
> the IOMMU API's memory type flags, so that callers can let the IOMMU
> drivers know to do the right thing.
>
> Signed-off-by: Robin Murphy <robin.murphy@....com>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@...natech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart@...asonboard.com>
> ---
> drivers/iommu/io-pgtable-arm.c | 9 +++++++--
> include/linux/iommu.h | 1 +
> 2 files changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
> index 381ca5a..9c19989 100644
> --- a/drivers/iommu/io-pgtable-arm.c
> +++ b/drivers/iommu/io-pgtable-arm.c
> @@ -355,7 +355,10 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct
> arm_lpae_io_pgtable *data, if (!(prot & IOMMU_WRITE) && (prot &
> IOMMU_READ))
> pte |= ARM_LPAE_PTE_AP_RDONLY;
>
> - if (prot & IOMMU_CACHE)
> + if (prot & IOMMU_MMIO)
> + pte |= (ARM_LPAE_MAIR_ATTR_IDX_DEV
> + << ARM_LPAE_PTE_ATTRINDX_SHIFT);
> + else if (prot & IOMMU_CACHE)
> pte |= (ARM_LPAE_MAIR_ATTR_IDX_CACHE
> << ARM_LPAE_PTE_ATTRINDX_SHIFT);
> } else {
> @@ -364,7 +367,9 @@ static arm_lpae_iopte arm_lpae_prot_to_pte(struct
> arm_lpae_io_pgtable *data, pte |= ARM_LPAE_PTE_HAP_READ;
> if (prot & IOMMU_WRITE)
> pte |= ARM_LPAE_PTE_HAP_WRITE;
> - if (prot & IOMMU_CACHE)
> + if (prot & IOMMU_MMIO)
> + pte |= ARM_LPAE_PTE_MEMATTR_DEV;
> + else if (prot & IOMMU_CACHE)
> pte |= ARM_LPAE_PTE_MEMATTR_OIWB;
> else
> pte |= ARM_LPAE_PTE_MEMATTR_NC;
> diff --git a/include/linux/iommu.h b/include/linux/iommu.h
> index a5c539f..34b6432 100644
> --- a/include/linux/iommu.h
> +++ b/include/linux/iommu.h
> @@ -30,6 +30,7 @@
> #define IOMMU_WRITE (1 << 1)
> #define IOMMU_CACHE (1 << 2) /* DMA cache coherency */
> #define IOMMU_NOEXEC (1 << 3)
> +#define IOMMU_MMIO (1 << 4) /* e.g. things like MSI doorbells */
>
> struct iommu_ops;
> struct iommu_group;
--
Regards,
Laurent Pinchart
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