lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Sat, 19 Mar 2016 16:56:51 +0100
From:	Borislav Petkov <bp@...en8.de>
To:	Thomas Gleixner <tglx@...utronix.de>
Cc:	Peter Zijlstra <peterz@...radead.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Ingo Molnar <mingo@...nel.org>, aherrmann@...e.com,
	jencce.kernel@...il.com, Rui Huang <ray.huang@....com>
Subject: Re: [PATCH 2/3] x86/topology: Fix AMD core count

On Sat, Mar 19, 2016 at 10:24:59AM +0100, Thomas Gleixner wrote:
> On Fri, 18 Mar 2016, Peter Zijlstra wrote:
> > It turns out AMD gets x86_max_cores wrong when there are compute
> > units.
> > 
> > The issue is that Linux assumes:
> > 
> > 	nr_logical_cpus = nr_cores * nr_siblings
> > 
> > But AMD reports its CU unit as 2 cores, but then sets num_smp_siblings
> > to 2 as well.
> > 
> > Cc: Ingo Molnar <mingo@...nel.org>
> > Cc: Borislav Petkov <bp@...en8.de>
> > Cc: Thomas Gleixner <tglx@...utronix.de>
> > Cc: Andreas Herrmann <aherrmann@...e.com>
> > Reported-by: Xiong Zhou <jencce.kernel@...il.com>
> > Fixes: 1f12e32f4cd5 ("x86/topology: Create logical package id")
> > Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
> > Link: http://lkml.kernel.org/r/20160317095220.GO6344@twins.programming.kicks-ass.net
> > ---
> >  arch/x86/kernel/cpu/amd.c |    8 ++++----
> >  arch/x86/kernel/smpboot.c |   11 ++++++-----
> >  2 files changed, 10 insertions(+), 9 deletions(-)
> > 
> > --- a/arch/x86/kernel/cpu/amd.c
> > +++ b/arch/x86/kernel/cpu/amd.c
> > @@ -313,9 +313,9 @@ static void amd_get_topology(struct cpui
> >  		node_id = ecx & 7;
> >  
> >  		/* get compute unit information */
> > -		smp_num_siblings = ((ebx >> 8) & 3) + 1;
> > +		cores_per_cu = smp_num_siblings = ((ebx >> 8) & 3) + 1;
> > +		c->x86_max_cores /= smp_num_siblings;
> 
> Unfortunately that will break stuff in event/amd/core.c, ras/mce_amd_inj.c
> which rely on the AMD interpretation of c->x86_max_cores.

What is the events/amd/core.c check even mean? We alloc an amd_nb per
core but not per thread?

The mce_amd_inj.c thing we could fix probably like this:

---
diff --git a/arch/x86/ras/mce_amd_inj.c b/arch/x86/ras/mce_amd_inj.c
index 55d38cfa46c2..b5a917d943c8 100644
--- a/arch/x86/ras/mce_amd_inj.c
+++ b/arch/x86/ras/mce_amd_inj.c
@@ -203,12 +203,7 @@ static void trigger_thr_int(void *info)
 
 static u32 get_nbc_for_node(int node_id)
 {
-	struct cpuinfo_x86 *c = &boot_cpu_data;
-	u32 cores_per_node;
-
-	cores_per_node = c->x86_max_cores / amd_get_nodes_per_socket();
-
-	return cores_per_node * node_id;
+	return boot_cpu_data.x86_max_cores * node_id;
 }
 
 static void toggle_nb_mca_mst_cpu(u16 nid)
---

-- 
Regards/Gruss,
    Boris.

ECO tip #101: Trim your mails when you reply.
--

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ