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Message-Id: <0AE41019-8E21-4C39-B21F-51CD08C1A3DF@martin.sperl.org>
Date:	Sat, 19 Mar 2016 11:10:16 +0100
From:	Martin Sperl <kernel@...tin.sperl.org>
To:	Stefan Wahren <stefan.wahren@...e.com>
Cc:	Eric Anholt <eric@...olt.net>,
	Michael Niewoehner <linux@...ewoehner.de>,
	Tao Huang <huangtao@...k-chips.com>,
	John Youn <John.Youn@...opsys.com>,
	Julius Werner <jwerner@...omium.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
	Caesar Wang <caesar.upstream@...il.com>,
	Doug Anderson <dianders@...omium.org>,
	Heiko Stuebner <heiko@...ech.de>,
	Felipe Balbi <balbi@...nel.org>,
	Remi Pommarel <repk@...plefau.lt>
Subject: Re: [RFT PATCH 2/2] Revert "usb: dwc2: Fix probe problem on bcm2835"

> On 19.03.2016, at 10:52, Stefan Wahren <stefan.wahren@...e.com> wrote:
> 
> Hi,
> 
>> Martin Sperl <kernel@...tin.sperl.org> hat am 19. März 2016 um 08:44
>> geschrieben:
>> 
>> 
>> 
>>> On 19.03.2016, at 03:17, Eric Anholt <eric@...olt.net> wrote:
>>> 
>>> Stefan Wahren <stefan.wahren@...e.com> writes:
>>> 
>>>> Hi Eric,
>>>> hi Martin,
>>>> 
>>>>> John Youn <John.Youn@...opsys.com> hat am 16. März 2016 um 19:28
>>>>> geschrieben:
>>>>> 
>>>>> 
>>>>> On 3/10/2016 11:14 AM, John Youn wrote:
>>>>>> On 3/9/2016 11:06 AM, Doug Anderson wrote:
>>>>>>> 
>>>>>>> John: it's pretty clear that there's something taking almost exactly
>>>>>>> 10ms on my system and almost exactly 50ms on Stefan's system. Is
>>>>>>> there some register we could poll to see when this process is done?
>>>>>>> ...or can we look at the dwc2 revision number / feature register and
>>>>>>> detect how long to delay?
>>>>>>> 
>> 
>> Maybe this difference is related to overclocking settings in the firmware?
>> 
>>>>> 
>>>>> 1. What is the AHB Clock frequency? Is the AHB Clock gated during
>>>>> Reset?
>>> 
>>> Low confidence here as I'm tracing lines across a ton of modules, but it
>>> looks like it comes from the USB AXI clock in peri_image, which is a
>>> gate on the normal 250Mhz APB clock, but nothing should be touching that
>>> gate register as part of USB reset as far as I know.
>>> 
>> Isn’t it possible that this clock (probably BCM2835_CLOCK_VPU) is
>> changed by the firmware due to overclocking settings in /boot/config.txt?
> 
> i don't use any overclocking settings. 
> 
> Are you able to reproduce the behavior on your Pi?

I did not have any problems with USB recently (using 4.5), 
so I would not have any idea how to reproduce it.

Note that I am using it with an AXIS USB-ethernet dongle plus USB-stick
all the time on my Compute Module connected via a tiny hub, 
so I wonder if that qualifies as being able to trigger the issue...

Martin

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