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Date:	Wed, 23 Mar 2016 17:04:56 -0500
From:	Matthew McClintock <mmcclint@...eaurora.org>
To:	andy.gross@...aro.org, linux-arm-msm@...r.kernel.org
Cc:	qca-upstream.external@....qualcomm.com,
	Matthew McClintock <mmcclint@...eaurora.org>,
	linus.walleij@...aro.org, bjorn.andersson@...aro.org,
	Sricharan R <sricharan@...eaurora.org>,
	Mathieu Olivari <mathieu@...eaurora.org>,
	Varadarajan Narayanan <varada@...eaurora.org>,
	linux-gpio@...r.kernel.org (open list:PIN CONTROL SUBSYSTEM),
	linux-kernel@...r.kernel.org (open list)
Subject: [PATCH 01/17] pinctrl: qcom: ipq4019: set ngpios to correct value

This should have been bumped to 100 when the extra pins
were added in the original pinctrl patch

CC: linus.walleij@...aro.org
CC: bjorn.andersson@...aro.org
Signed-off-by: Matthew McClintock <mmcclint@...eaurora.org>
---
 drivers/pinctrl/qcom/pinctrl-ipq4019.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/pinctrl/qcom/pinctrl-ipq4019.c b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
index b5d81ce..cb5f0a8 100644
--- a/drivers/pinctrl/qcom/pinctrl-ipq4019.c
+++ b/drivers/pinctrl/qcom/pinctrl-ipq4019.c
@@ -414,7 +414,7 @@ static const struct msm_pinctrl_soc_data ipq4019_pinctrl = {
 	.nfunctions = ARRAY_SIZE(ipq4019_functions),
 	.groups = ipq4019_groups,
 	.ngroups = ARRAY_SIZE(ipq4019_groups),
-	.ngpios = 70,
+	.ngpios = 100,
 };
 
 static int ipq4019_pinctrl_probe(struct platform_device *pdev)
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

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