linux-kernel - Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:	Mon, 28 Mar 2016 17:21:59 -0500
From:	Matthew McClintock <mmcclint@...eaurora.org>
To:	Guenter Roeck <linux@...ck-us.net>
Cc:	andy.gross@...aro.org, linux-arm-msm@...r.kernel.org,
	"qca-upstream.external" <qca-upstream.external@....qualcomm.com>,
	Wim Van Sebroeck <wim@...ana.be>,
	"open list:WATCHDOG DEVICE DRIVERS" <linux-watchdog@...r.kernel.org>,
	open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 07/17] watchdog: qcom: add option for standalone watchdog not in timer block

On Mar 28, 2016, at 4:56 PM, Guenter Roeck <linux@...ck-us.net> wrote:
> 
>> So taken from the timer offset 0x0208A000 I just have a generic counter register CPU0_APCS_GPT0_CNT at 0x8
>> 
>> What doc are you looking at?
>> 
> "Qualcomm Snapdragon 600 Processor APQ8064 Hardware Register Description"
> 
> It is available for download from the Qualcomm web site.
> 
> See chapter 12.10.3, "Watchdog timer registers". The register block is at
> 0x28882000. Registers are almost the same, except for the offset and the
> definition of the bits in the enable register.
> 
> LPASS is "Low Power Audio Subsystem". Maybe it has its own watchdog.

This block is here:

11.15 KPSS CPU0 Timer Registers (0x0208A000 CPU0_APCS_TMR_BASE)

-M