linux-kernel - [tip:x86/urgent] x86/cpufreq: Remove duplicated TDP MSR macro definitions

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Date:	Tue, 29 Mar 2016 02:15:35 -0700
From:	tip-bot for Vladimir Zapolskiy <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	tglx@...utronix.de, linux-kernel@...r.kernel.org,
	len.brown@...el.com, srinivas.pandruvada@...ux.intel.com,
	rafael.j.wysocki@...el.com, mingo@...nel.org, hpa@...or.com,
	vladimir_zapolskiy@...tor.com
Subject: [tip:x86/urgent] x86/cpufreq: Remove duplicated TDP MSR macro
 definitions

Commit-ID:  4a6772f514891eaacf26bcb7c2c808c557d23c6f
Gitweb:     http://git.kernel.org/tip/4a6772f514891eaacf26bcb7c2c808c557d23c6f
Author:     Vladimir Zapolskiy <vladimir_zapolskiy@...tor.com>
AuthorDate: Sat, 26 Mar 2016 20:47:00 +0200
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Tue, 29 Mar 2016 11:12:10 +0200

x86/cpufreq: Remove duplicated TDP MSR macro definitions

The list of CPU model specific registers contains two copies of TDP
registers, remove the one, which is out of numerical order in the
list.

Fixes: 6a35fc2d6c22 ("cpufreq: intel_pstate: get P1 from TAR when available")
Signed-off-by: Vladimir Zapolskiy <vladimir_zapolskiy@...tor.com>
Cc: Len Brown <len.brown@...el.com>
Cc: "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>
Cc: Kristen Carlson
 Accardi <kristen@...ux.intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@...ux.intel.com>
Link: http://lkml.kernel.org/r/1459018020-24577-1-git-send-email-vladimir_zapolskiy@mentor.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>

---
 arch/x86/include/asm/msr-index.h | 8 +-------
 1 file changed, 1 insertion(+), 7 deletions(-)

diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h
index 2da46ac..426e946 100644
--- a/arch/x86/include/asm/msr-index.h
+++ b/arch/x86/include/asm/msr-index.h
@@ -190,6 +190,7 @@
 #define MSR_PP1_ENERGY_STATUS		0x00000641
 #define MSR_PP1_POLICY			0x00000642
 
+/* Config TDP MSRs */
 #define MSR_CONFIG_TDP_NOMINAL		0x00000648
 #define MSR_CONFIG_TDP_LEVEL_1		0x00000649
 #define MSR_CONFIG_TDP_LEVEL_2		0x0000064A
@@ -210,13 +211,6 @@
 #define MSR_GFX_PERF_LIMIT_REASONS	0x000006B0
 #define MSR_RING_PERF_LIMIT_REASONS	0x000006B1
 
-/* Config TDP MSRs */
-#define MSR_CONFIG_TDP_NOMINAL		0x00000648
-#define MSR_CONFIG_TDP_LEVEL1		0x00000649
-#define MSR_CONFIG_TDP_LEVEL2		0x0000064A
-#define MSR_CONFIG_TDP_CONTROL		0x0000064B
-#define MSR_TURBO_ACTIVATION_RATIO	0x0000064C
-
 /* Hardware P state interface */
 #define MSR_PPERF			0x0000064e
 #define MSR_PERF_LIMIT_REASONS		0x0000064f