lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <5801670.ZsrEAbzXnC@ws-stein>
Date:	Thu, 31 Mar 2016 10:58:31 +0200
From:	Alexander Stein <alexander.stein@...tec-electronic.com>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	Alexandre Courbot <gnurou@...il.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] gpio: mcp23s08: Add support for level triggered interrupts

On Thursday 31 March 2016 10:41:24, Linus Walleij wrote:
> On Wed, Mar 23, 2016 at 6:01 PM, Alexander Stein
> 
> <alexander.stein@...tec-electronic.com> wrote:
> > The interrupt for the corresponding pin is configured to trigger when the
> > pin state changes compared to a preconfigured state (Bit set in INTCON).
> > This state is set by setting/clearing the bit in DEFVAL.
> > In the interrupt handler we need also to check if the bit in INTCON is set
> > for level triggered interrupts.
> > 
> > Signed-off-by: Alexander Stein <alexander.stein@...tec-electronic.com>
> 
> Patch applied.
> 
> I'm a bit concerned that you now support both edge and level trigged
> IRQs but this driver is using handle_simple_irq() in the
> gpiochip_irqchip_add() call. I guess it "just works" because
> the hardware will latch the edge IRQ and clear it when reading the
> status register.

>From the reference manual:
> The INTCAP register captures the GPIO port value at
> the time the interrupt occurred. The register is ‘read
> only’ and is updated only when an interrupt occurs. The
> register will remain unchanged until the interrupt is
> cleared via a read of INTCAP or GPIO.

So, i guess you're right. Although currently I don't know why 
handle_simple_irq would not work if this would not be the case.

> I guess you have tested it with both edge and level IRQs?

Yep, I have buttons and a PCA9555 added to MCP23S17. Buttons are gpio-keys, so 
rising and falling edge interrupts and PCA9555 uses low level interrupts.
See this excerpt from /proc/interrupts:

 79:          0          2  gpio-mcp23xxx   8 Edge      Digital In 0
 84:          0          4  gpio-mcp23xxx  13 Level     0-0024

Best regards,
Alexander

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ