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Message-ID: <20160331141949.GA20345@rob-hp-laptop>
Date:	Thu, 31 Mar 2016 09:19:49 -0500
From:	Rob Herring <robh@...nel.org>
To:	Cyrille Pitchen <cyrille.pitchen@...el.com>
Cc:	computersforpeace@...il.com, linux-mtd@...ts.infradead.org,
	nicolas.ferre@...el.com, boris.brezillon@...e-electrons.com,
	marex@...x.de, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org, pawel.moll@....com,
	mark.rutland@....com, ijc+devicetree@...lion.org.uk,
	galak@...eaurora.org
Subject: Re: [PATCH v4 2/2] doc: dt: mtd: add a DT property to enable the use
 of 4byte-address op codes

On Tue, Mar 29, 2016 at 02:24:13PM +0200, Cyrille Pitchen wrote:
> This patch adds a new optional DT property which enables an alternative
> way of supporting memory size above 16MiB (128Mib). This new mechanism
> translates the regular 3byte-address op codes into their 4byte-address
> version whereas the old/default mecanism makes the SPI memory enter its
> 4byte-address mode, which has annoying side effects for early bootloaders.
> 
> We cannot discover at run time whether the SPI NOR memory supports the
> 4byte-address op codes. For instance both Macronix MX25L25635E and
> MX25L25673G share the same JEDEC ID (C22019 without any extension byte).
> However the first one doesn't support 4byte-address op codes whereas the
> second one does.
> 
> Signed-off-by: Cyrille Pitchen <cyrille.pitchen@...el.com>
> ---
>  Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt | 11 +++++++++++
>  1 file changed, 11 insertions(+)

Acked-by: Rob Herring <robh@...nel.org>

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