linux-kernel - [PATCHv2 4/7] Documentation: dt: socfpga: Add Altera Arria10 OCRAM binding

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1459450087-24792-5-git-send-email-tthayer@opensource.altera.com>
Date:	Thu, 31 Mar 2016 13:48:04 -0500
From:	<tthayer@...nsource.altera.com>
To:	<bp@...en8.de>, <dougthompson@...ssion.com>,
	<m.chehab@...sung.com>, <robh+dt@...nel.org>, <pawel.moll@....com>,
	<mark.rutland@....com>, <ijc+devicetree@...lion.org.uk>,
	<galak@...eaurora.org>, <linux@....linux.org.uk>,
	<dinguyen@...nsource.altera.com>, <grant.likely@...aro.org>
CC:	<devicetree@...r.kernel.org>, <linux-doc@...r.kernel.org>,
	<linux-edac@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	<tthayer@...nsource.altera.com>
Subject: [PATCHv2 4/7] Documentation: dt: socfpga: Add Altera Arria10 OCRAM binding

From: Thor Thayer <tthayer@...nsource.altera.com>

Add the device tree bindings needed to support the Altera On-Chip
RAM ECC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@...nsource.altera.com>
---
v2: Align Required Properties descriptions
---
 .../bindings/arm/altera/socfpga-eccmgr.txt         |   10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
index 37ff9bf..5a6b160 100644
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-eccmgr.txt
@@ -71,6 +71,11 @@ Required Properties:
 - compatible : Should be "altr,socfpga-a10-l2-ecc"
 - reg : Address and size for ECC error interrupt clear registers.
 
+On-Chip RAM ECC
+Required Properties:
+- compatible : Should be "altr,socfpga-a10-ocram-ecc"
+- reg        : Address and size for ECC block registers.
+
 Example:
 
 	eccmgr: eccmgr@...06000 {
@@ -86,4 +91,9 @@ Example:
 			compatible = "altr,socfpga-a10-l2-ecc";
 			reg = <0xffd06010 0x4>;
 		};
+
+		ocram-ecc@...c3000 {
+			compatible = "altr,socfpga-a10-ocram-ecc";
+			reg = <0xff8c3000 0x90>;
+		};
 	};
-- 
1.7.9.5