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Message-ID: <20160407175740.GJ32257@rob-hp-laptop>
Date:	Thu, 7 Apr 2016 12:57:40 -0500
From:	Rob Herring <robh@...nel.org>
To:	Stefan Agner <stefan@...er.ch>
Cc:	dri-devel@...ts.freedesktop.org, shawnguo@...nel.org,
	kernel@...gutronix.de, airlied@...ux.ie, daniel.vetter@...ll.ch,
	jianwei.wang.chn@...il.com, alison.wang@...escale.com,
	meng.yi@....com, alexander.stein@...tec-electronic.com,
	mturquette@...libre.com, sboyd@...eaurora.org,
	mark.rutland@....com, pawel.moll@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org,
	linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 4/9] drm/fsl-dcu: add extra clock for pixel clock

On Mon, Apr 04, 2016 at 10:28:36PM -0700, Stefan Agner wrote:
> The Vybrid DCU variant has two independent clock inputs, one
> for the registers (IPG bus clock) and one for the pixel clock.
> Support this distinction in the DCU DRM driver while staying
> backward compatible for old device trees.
> 
> Signed-off-by: Stefan Agner <stefan@...er.ch>
> ---
>  Documentation/devicetree/bindings/display/fsl,dcu.txt | 11 +++++++----

Acked-by: Rob Herring <robh@...nel.org>

>  drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c            |  2 +-
>  drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c             | 16 +++++++++++++++-
>  drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.h             |  1 +
>  4 files changed, 24 insertions(+), 6 deletions(-)

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