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Message-ID: <570765BD.20908@redhat.com>
Date:	Fri, 8 Apr 2016 10:03:09 +0200
From:	Laurent Vivier <lvivier@...hat.com>
To:	Thomas Huth <thuth@...hat.com>, kvm-ppc@...r.kernel.org,
	kvm@...r.kernel.org
Cc:	Gleb Natapov <gleb@...nel.org>,
	Paolo Bonzini <pbonzini@...hat.com>,
	Alexander Graf <agraf@...e.com>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Paul Mackerras <paulus@...ba.org>,
	Michael Ellerman <mpe@...erman.id.au>,
	linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
	dgibson@...hat.com
Subject: Re: [PATCH] kvm-pr: manage single-step mode



On 08/04/2016 09:44, Thomas Huth wrote:
> On 08.04.2016 08:58, Laurent Vivier wrote:
>>
>>
>> On 08/04/2016 08:23, Thomas Huth wrote:
>>> On 22.03.2016 15:53, Laurent Vivier wrote:
>>>> Until now, when we connect gdb to the QEMU gdb-server, the
>>>> single-step mode is not managed.
>>>>
>>>> This patch adds this, only for kvm-pr:
>>>>
>>>> If KVM_GUESTDBG_SINGLESTEP is set, we enable single-step trace bit in the
>>>> MSR (MSR_SE) just before the __kvmppc_vcpu_run(), and disable it just after.
>>>> In kvmppc_handle_exit_pr, instead of routing the interrupt to
>>>> the guest, we return to host, with KVM_EXIT_DEBUG reason.
>>>>
>>>> Signed-off-by: Laurent Vivier <lvivier@...hat.com>
>>>> ---
>>>>  arch/powerpc/kvm/book3s_pr.c | 31 +++++++++++++++++++++++++++++--
>>>>  1 file changed, 29 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c
>>>> index 95bceca..e6896f4 100644
>>>> --- a/arch/powerpc/kvm/book3s_pr.c
>>>> +++ b/arch/powerpc/kvm/book3s_pr.c
>>>> @@ -882,6 +882,24 @@ void kvmppc_set_fscr(struct kvm_vcpu *vcpu, u64 fscr)
>>>>  }
>>>>  #endif
>>>>  
>>>> +static void kvmppc_setup_debug(struct kvm_vcpu *vcpu)
>>>> +{
>>>> +	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
>>>> +		u64 msr = kvmppc_get_msr(vcpu);
>>>> +
>>>> +		kvmppc_set_msr(vcpu, msr | MSR_SE);
>>>> +	}
>>>> +}
>>>> +
>>>> +static void kvmppc_clear_debug(struct kvm_vcpu *vcpu)
>>>> +{
>>>> +	if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
>>>> +		u64 msr = kvmppc_get_msr(vcpu);
>>>> +
>>>> +		kvmppc_set_msr(vcpu, msr & ~MSR_SE);
>>>> +	}
>>>> +}
>>>> +
>>>>  int kvmppc_handle_exit_pr(struct kvm_run *run, struct kvm_vcpu *vcpu,
>>>>  			  unsigned int exit_nr)
>>>>  {
>>>> @@ -1208,8 +1226,13 @@ program_interrupt:
>>>>  #endif
>>>>  	case BOOK3S_INTERRUPT_MACHINE_CHECK:
>>>>  	case BOOK3S_INTERRUPT_TRACE:
>>>> -		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
>>>> -		r = RESUME_GUEST;
>>>> +		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
>>>> +			run->exit_reason = KVM_EXIT_DEBUG;
>>>> +			r = RESUME_HOST;
>>>> +		} else {
>>>> +			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
>>>> +			r = RESUME_GUEST;
>>>> +		}
>>>
>>> Should the new code rather be limited to the BOOK3S_INTERRUPT_TRACE case
>>> only? I mean, this way, you never can deliver a machine check interrupt
>>> to the guest if singlestep debugging is enabled on the host, can you?
>>
>> You're right but it adds complexity and it would be only useful to
>> single-step the single-step mode of the guest.
>>
>> It's hard to imagine a developer single-stepping the guest kernel while
>> he is single-stepping a user application in the guest.
> 
> Hmm, not sure whether you've got me right ;-) I rather meant: What

Yes, I've missed what you mean. :(
Thank you to try again :)

> happens when a machine check is supposed to happen in the guest while
> single stepping is enabled at the host level? IMHO it would be better to
> shape the code like this:
> 
>   	case BOOK3S_INTERRUPT_MACHINE_CHECK:
> 		kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
> 		r = RESUME_GUEST;
> 		break;
> 	case BOOK3S_INTERRUPT_TRACE:
> 		if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
> 			run->exit_reason = KVM_EXIT_DEBUG;
> 			r = RESUME_HOST;
> 		} else {
> 			kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
> 			r = RESUME_GUEST;
> 		}
> 
> That means, split the two cases, to keep the old behavior for the
> MACHINE_CHECK case. That's also not too much of additional complexity,
> is it?

Yes, you're right.

Thanks,
Laurent

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