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Message-ID: <570B8310.40103@hisilicon.com>
Date: Mon, 11 Apr 2016 18:57:20 +0800
From: Chen Feng <puck.chen@...ilicon.com>
To: Will Deacon <will.deacon@....com>,
Ard Biesheuvel <ard.biesheuvel@...aro.org>
CC: Mark Rutland <mark.rutland@....com>, <mhocko@...e.com>,
Laura Abbott <labbott@...hat.com>,
Dan Zhao <dan.zhao@...ilicon.com>,
Yiping Xu <xuyiping@...ilicon.com>, <puck.chen@...mail.com>,
<albert.lubing@...ilicon.com>,
Catalin Marinas <catalin.marinas@....com>,
<suzhuangluan@...ilicon.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
<linuxarm@...wei.com>, "linux-mm@...ck.org" <linux-mm@...ck.org>,
<kirill.shutemov@...ux.intel.com>,
David Rientjes <rientjes@...gle.com>,
<oliver.fu@...ilicon.com>,
Andrew Morton <akpm@...ux-foundation.org>,
<robin.murphy@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
<saberlily.xia@...ilicon.com>
Subject: Re: [PATCH 1/2] arm64: mem-model: add flatmem model for arm64
Hi Will,
On 2016/4/11 18:40, Will Deacon wrote:
> On Mon, Apr 11, 2016 at 12:31:53PM +0200, Ard Biesheuvel wrote:
>> On 11 April 2016 at 11:59, Chen Feng <puck.chen@...ilicon.com> wrote:
>>> Please see the pg-tables below.
>>>
>>>
>>> With sparse and vmemmap enable.
>>>
>>> ---[ vmemmap start ]---
>>> 0xffffffbdc0200000-0xffffffbdc4800000 70M RW NX SHD AF UXN MEM/NORMAL
>>> ---[ vmemmap end ]---
>>>
>>
>> OK, I see what you mean now. Sorry for taking so long to catch up.
>>
>>> The board is 4GB, and the memap is 70MB
>>> 1G memory --- 14MB mem_map array.
>>
>> No, this is incorrect. 1 GB corresponds with 16 MB worth of struct
>> pages assuming sizeof(struct page) == 64
>>
>> So you are losing 6 MB to rounding here, which I agree is significant.
>> I wonder if it makes sense to use a lower value for SECTION_SIZE_BITS
>> on 4k pages kernels, but perhaps we're better off asking the opinion
>> of the other cc'ees.
>
> You need to be really careful making SECTION_SIZE_BITS smaller because
> it has a direct correlation on the use of page->flags and you can end up
> running out of bits fairly easily.
Yes, making SECTION_SIZE_BITS smaller can solve the current situation.
But if the phys-addr is 64GB, but only 4GB ddr is the valid address. And the
holes are not always 512MB.
But, can you tell us why *smaller SIZE makes running out of bits fairly easily*?
And how about the flat-mem model?
>
> Will
>
> .
>
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