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Message-Id: <1460492471-15527-5-git-send-email-jeremy.linton@arm.com>
Date: Tue, 12 Apr 2016 15:21:09 -0500
From: Jeremy Linton <jeremy.linton@....com>
To: linux-kernel@...r.kernel.org
Cc: will.deacon@....com, mark.rutland@....com, peterz@...radead.org,
mingo@...hat.com, catalin.marinas@....com, msalter@...hat.com,
timur@...eaurora.org, nleeder@...eaurora.org,
agustinv@...eaurora.org, sfr@...b.auug.org.au,
jan.glauber@...il.com, Jeremy Linton <jeremy.linton@....com>
Subject: [PATCH 4/6] arm: arm64: Add routine to determine cpuid of other cpus
It is helpful if we can read the cpuid/midr of other CPUs
in the system independent of arm/arm64.
Signed-off-by: Jeremy Linton <jeremy.linton@....com>
---
arch/arm/include/asm/cputype.h | 4 ++++
arch/arm64/include/asm/cputype.h | 3 +++
2 files changed, 7 insertions(+)
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h
index b23c6c8..274baf4 100644
--- a/arch/arm/include/asm/cputype.h
+++ b/arch/arm/include/asm/cputype.h
@@ -208,6 +208,10 @@ static inline unsigned int __attribute_const__ read_cpuid_mpidr(void)
return read_cpuid(CPUID_MPIDR);
}
+#define read_specific_cpuid(cpu_num) per_cpu_ptr(&cpu_data, cpu_num)->cpuid
+
+
+
/*
* Intel's XScale3 core supports some v6 features (supersections, L2)
* but advertises itself as v5 as it does not support the v6 ISA. For
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 87e1985..76423a7 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -126,6 +126,9 @@ static inline u32 __attribute_const__ read_cpuid_cachetype(void)
{
return read_cpuid(CTR_EL0);
}
+
+#define read_specific_cpuid(cpu_num) per_cpu_ptr(&cpu_data, cpu_num)->reg_midr
+
#endif /* __ASSEMBLY__ */
#endif
--
2.4.3
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