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Message-ID: <1460546565.19152.148.camel@nexus-software.ie>
Date:	Wed, 13 Apr 2016 12:22:45 +0100
From:	Bryan O'Donoghue <pure.logic@...us-software.ie>
To:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Andy Shevchenko <andy.shevchenko@...il.com>
Cc:	Vinod Koul <vinod.koul@...el.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	dmaengine <dmaengine@...r.kernel.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	"Puustinen, Ismo" <ismo.puustinen@...el.com>,
	Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
	"linux-serial@...r.kernel.org" <linux-serial@...r.kernel.org>
Subject: Re: [PATCH v1 12/12] serial: 8250_lpss: enable DMA on Intel Quark
 UART

On Tue, 2016-04-12 at 19:50 +0300, Andy Shevchenko wrote:
> > I haven't read your V2 yet but on this, I'd suggest raising the
> burst
> > size to 32 bytes for UART (no higher) we found during bringup that
> > larger sizes "fall-over and die" but, anything up to 32 bytes is OK
> -
> > and therefore you should be able to reduce the number of
> > bursts/interrupts etc.
> 
> It can't be more that FIFO size and recommendation as far as I know
> is
> FIFO/2, which is exactly 8 bytes.

Why not ?

We went as high as 32 bytes previously in the BSP with no obvious
errors.

At 8 bytes or 1/2 of the FIFO size I'd ask the question is DMA even
worth it i.e. does it take more time to setup and execute a DMA
transaction @ 1/2 FIFO size than just writing straight into the FIFO ?

---
bod

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