linux-kernel - Re: [PATCH 1/2] x86/arch_prctl: add ARCH_SET_{COMPAT,NATIVE} to change compatible mode

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <570E79EF.7030408@virtuozzo.com>
Date:	Wed, 13 Apr 2016 19:55:11 +0300
From:	Dmitry Safonov <dsafonov@...tuozzo.com>
To:	Andy Lutomirski <luto@...capital.net>
CC:	Thomas Gleixner <tglx@...utronix.de>,
	Shuah Khan <shuahkh@....samsung.com>,
	Ingo Molnar <mingo@...hat.com>,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	Borislav Petkov <bp@...en8.de>, <khorenko@...tuozzo.com>,
	X86 ML <x86@...nel.org>,
	Andrew Morton <akpm@...ux-foundation.org>,
	<xemul@...tuozzo.com>, <linux-kselftest@...r.kernel.org>,
	Cyrill Gorcunov <gorcunov@...nvz.org>,
	Dmitry Safonov <0x7f454c46@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"H. Peter Anvin" <hpa@...or.com>
Subject: Re: [PATCH 1/2] x86/arch_prctl: add ARCH_SET_{COMPAT,NATIVE} to
 change compatible mode

On 04/08/2016 11:44 PM, Andy Lutomirski wrote:
> Feel free to ask for help on some of these details.  user_64bit_mode
> will be helpful too.
Hello again,

here are some questions on  TIF_IA32 removal:
- in function intel_pmu_pebs_fixup_ip: there is need to
know if process was it native/compat mode for instruction
interpreter for IP + one instruction fixup. There are
registers, but they are from PEBS, which does not contain
segment descriptors (even for PEBSv3). Other values
are from interrupt regs (look at setup_pebs_sample_data).
So, I guess, we may use user_64bit_mode on interrupt
register set, which will be racy with changing task's mode,
but quite ok?
- the same with LBR branching: I may got cs value for
user_64bit_mode or all registers set from intel_pmu_handle_irq
and pass it through intel_pmu_lbr_read => intel_pmu_lbr_filter
to branch_type for instruction decoder, which may
missinterpret opcode for the same racy-mode-switching app.
Is it also fine?
- for coredumping/ptracing, I will change test_thread_flag(TIF_IA32)
by user_64bit_mode(task_pt_regs()) - that looks/should be simple.
It's also valid as at the moment of coredump or of
PTRACE_GETREGSET task isn't running.
- I do not know what to do with uprobes - as you noted,
the way it cheks ia32_compat is buggy even now: task that
switches CS to __USER32_CS or back to __USER_CS will have
lousy inserted uprobe in mm.
So, how do we know on insert-time, with which descriptor
will be program on uprobed code?
- for MPX, I guess, tracking which syscall called
mpx_enable_management will work, at least it may be
documented, that before switching, one need to disable mpx.
- perf_reg_abi everywhere is used with current, so it's
also simple-switching to user_64bit_mode(task_pt_regs(current)).

For the conclusion:
I will send those patches, but I do not know what to do with
uprobes tracing. Could you give an advice what to do with
that?
It seems like, if I do those things, I will only need a way to
change vdso blob, without swapping some compatible flags,
as 64-bit tasks will differ from 32-bit only by the way they
execute syscalls.