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Message-ID: <20160413172318.GC29471@sirena.org.uk>
Date:	Wed, 13 Apr 2016 18:23:18 +0100
From:	Mark Brown <broonie@...nel.org>
To:	Giuseppe CAVALLARO <peppe.cavallaro@...com>
Cc:	Peter Griffin <peter.griffin@...aro.org>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	lgirdwood@...il.com, srinivas.kandagatla@...il.com,
	maxime.coquelin@...com, patrice.chotard@...com,
	lee.jones@...aro.org, devicetree@...r.kernel.org,
	Youssef TRIKI <youssef.triki@...com>
Subject: Re: [PATCH 2/5] regulator: st-flashss: Add a regulator driver for
 flashss vsense.

On Wed, Apr 13, 2016 at 09:59:00AM +0200, Giuseppe CAVALLARO wrote:
> On 4/13/2016 8:15 AM, Mark Brown wrote:
> >>>+static void st_get_satinize_powerup_voltage(struct st_vsense *vsense)
> >>>+{

> >or am I missing something?  Why do we need to do this anyway, it's very
> >surprsing?

> This functions is to sanitize the vsense voltages when the regulator
> is probed and in some circumstances the reset value of this register
> does not reflect the hw status/config. For example, by default, after
> the reset, the bit 0 is set so the EMMC, inside the flash subsystem,
> is supposed to operate at 3v3. But the latched bit 24 can be 0 on
> a platform where it is actually set at 1v8.
> So the bit 0 must be reset to keep this coherent and to allow MMC
> framework to properly setup the Vdd when the framework starts.

I'm afraid I can't follow that explanation, perhaps because I don't know
anything about the content of this register except for these three bits.
I think we do need a comment in the driver explaining what's going on,
and probably a simplification of the code too if my understanding of the
effect of all those operations is correct.

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