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Message-ID: <4176514.rpsd1Fqbyv@diego>
Date: Thu, 14 Apr 2016 06:56:08 +0200
From: Heiko Stübner <heiko@...ech.de>
To: Stephen Boyd <sboyd@...eaurora.org>
Cc: Finlye Xiao <finley.xiao@...k-chips.com>, mturquette@...libre.com,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, zhengxing@...k-chips.com,
wxt@...k-chips.com, zyw@...k-chips.com, jay.xu@...k-chips.com,
zhangqing@...k-chips.com, xxx@...k-chips.com,
huangtao@...k-chips.com
Subject: Re: [PATCH v1] clk: Add clk_composite_set_rate_and_parent
Am Mittwoch, 13. April 2016, 17:43:31 schrieb Stephen Boyd:
> On 04/12, Heiko Stuebner wrote:
> > I remember having clocks not overflow their target rate came up in some
> > ELC
> > talk last week (probably in Stephens Qualcomm-kernel-talk) and a general
> > solution might need some changes closer to the core.
>
> Yep. It's on the list. Hopefully coordinated clk rate changes
> will help here. Composite clks are sort of already coordinated
> rates in a minor form though.
Which is why I hope we can land this (meaning v2 from tuesday) in the
meantime, as it fixes an issue we're seeing on the rk3399 and shouldn't affect
any part of the core clock-framework ;-) .
Heiko
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