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Message-ID: <CALCETrXDHr+N+a-zSqwcMZT41XCZT12pHP5NO2Esj7_e8VT70A@mail.gmail.com>
Date: Thu, 14 Apr 2016 17:06:10 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Andi Kleen <andi@...stfloor.org>
Cc: X86 ML <x86@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 2/9] x86: Add support for rd/wr fs/gs base
On Mon, Mar 21, 2016 at 9:16 AM, Andi Kleen <andi@...stfloor.org> wrote:
> From: Andi Kleen <ak@...ux.intel.com>
>
> Introduction:
>
> IvyBridge added four new instructions to directly write the fs and gs
> 64bit base registers. Previously this had to be done with a system
> call to write to MSRs. The main use case is fast user space threading
> and switching the fs/gs registers quickly there. Another use
> case is having (relatively) cheap access to a new address
> register per thread.
I'm queuing up a variant of this patch. I'll send it out for review
when it's ready.
--Andy
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